Method and apparatus for providing intelligent power management
DCFirst Claim
Patent Images
1. A power management apparatus for a circuit in a processor-based system, comprising:
- a memory to store instruction sequences by which the processor-based system is processed, said stored instruction sequences to execute separately from an application program that is using said circuit; and
a processor coupled to the memory, wherein the stored instruction sequences cause the processor to;
(a) determine an operational mode of the circuit, where said operational mode indicates an application type of the application program that is using said circuit;
(b) operate the circuit at one of a first predetermined speed and a second predetermined speed in response to the operational mode of the circuit, said first predetermined speed being slower than the second predetermined speed.
6 Assignments
Litigations
1 Petition
Accused Products
Abstract
The present invention is an apparatus and method for providing power management apparatus for a circuit in a processor-based system. The apparatus comprises a memory to store instruction sequences by which the processor-based system is processed and a processor coupled to the memory. The stored instruction sequences cause the processor to: (a) determine a system access time of the circuit; (b) determine if the system access time is less than a first predetermined value, if so, increasing an accessibility period of the circuit, during which the circuit is active. Various embodiments are described.
-
Citations
13 Claims
-
1. A power management apparatus for a circuit in a processor-based system, comprising:
-
a memory to store instruction sequences by which the processor-based system is processed, said stored instruction sequences to execute separately from an application program that is using said circuit; and
a processor coupled to the memory, wherein the stored instruction sequences cause the processor to;
(a) determine an operational mode of the circuit, where said operational mode indicates an application type of the application program that is using said circuit;
(b) operate the circuit at one of a first predetermined speed and a second predetermined speed in response to the operational mode of the circuit, said first predetermined speed being slower than the second predetermined speed.- View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. A method for providing power management for a circuit in a processor-based system, comprising:
-
(a) determining an operational mode of the circuit using an instruction sequence executing separately from an application program that is using said circuit, said operational mode to indicate an application type of the application program that is using said circuit; and
(b) operating the circuit at one of a first predetermined speed and a second predetermined speed in response to the operational mode of the circuit, said first predetermined speed being slower than the second predetermined speed. - View Dependent Claims (9)
-
-
10. A computer-readable apparatus, comprising:
a computer-readable medium that stores an instruction sequence which when executed by a processor causes the processor to;
(a) determine an operational mode of the circuit that indicates an application type of an application program that is using said circuit, said instruction sequence to be executed separate from the application program that is using said circuit; and
(b) operating the circuit at one of a first predetermined speed and a second predetermined speed in response to the operational mode of the circuit, said first predetermined speed being slower than the second predetermined speed.- View Dependent Claims (11, 12, 13)
Specification