Method for shallow trench isolation using passivation material for trench bottom liner

• US 6,524,929 B1
• Filed: 02/26/2001
• Issued: 02/25/2003
• Est. Priority Date: 02/26/2001
• Status: Expired due to Term

• Current Assignee: Advanced Micro Devices, Inc.
• Original Assignee: Advanced Micro Devices, Inc.
• Inventors: Xiang, Qi, Fisher, Philip A.
• Primary Examiner(s): Chaudhuri, Olik
• Assistant Examiner(s): Mai, Anh Duy
• Application Number:
  US09/794,894
• Time in Patent Office: 729 Days
• Field of Search: 438/424, 438/425, 438/435, 438/437, 438/479
• US Class Current: 438/424
• CPC Class Codes: H01L 21/76264 SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
• CPC Class Codes: H01L 21/76283 Lateral isolation by refilling of trenches with dielectric material

Abstract

A method of isolation of active islands on a silicon-on-insulator semiconductor device, comprising the steps of providing a silicon-on-insulator semiconductor wafer having a silicon active layer, a dielectric insulation layer and a silicon substrate; forming an isolation trench through the silicon active layer, the isolation trench defining at least one active island in the silicon active layer; depositing a passivating insulator in a lower portion of the isolation trench; and filling the isolation trench above the passivating insulator with a trench isolation material.

Claims

1. A method of isolation of active islands on a silicon-on-insulator semiconductor device, comprising the steps of:

providing a silicon-on-insulator semiconductor wafer having a silicon active layer, a dielectric insulation layer and a silicon substrate, in which the silicon active layer is formed on the dielectric insulation layer and the dielectric insulation layer is formed on the silicon substrate;

forming an isolation trench through the silicon active layer, the isolation trench defining at least one active island in the silicon active layer;

depositing a passivating insulator in a lower portion of the isolation trench to a depth sufficient to provide a protective shield or barrier whereby a bird'"'"'s beak cannot form between the silicon active layer and the dielectric insulation layer;

rounding at least one corner of the active island in an upper portion of the silicon active layer and forming a sidewall oxide liner in the isolation trench by a thermal oxidation of the silicon active layer exposed in the isolation trench; and

filling the isolation trench above the passivating insulator with a trench isolation material.

2. The method of claim 1, wherein the trench isolation material is a dielectric material comprising one or more of silicon dioxide, silicon nitride or silicon oxynitride.

3. The method of claim 1, wherein the depositing step includes a directional deposition, whereby the passivating insulator is deposited substantially only in the lower portion of the isolation trench.

4. The method of claim 3, wherein the directional deposition is by one of physical vapor deposition, sputtering, thermal CVD or a plasma enhanced method.

5. The method of claim 1, wherein the step of depositing is followed by a step of etching away passivating insulator deposited on sidewalls of the isolation trench.

6. The method of claim 1, further comprising a step of selectively etching away passivating insulator deposited on sidewalls of the isolation trench.

7. The method of claim 1, wherein the method further comprises forming a liner in the isolation trench prior to filling the isolation trench.

8. The method of claim 1, wherein the passivating insulator comprises at least one of an oxide of silicon, a nitride of silicon, a mixture thereof or a mixed oxide and nitride of silicon.

9. The method of claim 1, wherein the trench isolation material is a dielectric.

10. The method of claim 1, wherein the step of filling fills the isolation trench at least to a level substantially flush with an upper surface of the silicon active layer.

11. The method of claim 1, wherein the passivating insulator provides a shield between the isolation trench and a lower portion of the silicon active layer.

12. A method of isolation of active islands on a silicon-on-insulator semiconductor device, comprising the steps of:

providing a silicon-on-insulator semiconductor wafer having a silicon active layer, a dielectric insulation layer and a silicon substrate, in which the silicon active layer is formed on the dielectric insulation layer and the dielectric insulation layer is formed on the silicon substrate;

etching through the silicon active layer to form an isolation trench through the silicon active layer, the isolation trench defining at least one active island in the silicon active layer;

depositing a passivating insulator substantially only at the lower portion of the isolation trench to a depth and width sufficient to provide a protective shield or barrier whereby a bird'"'"'s beak cannot form between the silicon active layer and the dielectric insulation layer;

rounding at least one corner of the active island in an upper portion of the silicon active layer;

forming a sidewall oxide liner in the isolation trench by a thermal oxidation of the silicon active layer exposed in the isolation trench; and

filling the isolation trench above the passivating insulator with a dielectric trench isolation material.

13. The method of claim 12, wherein the step of depositing includes a directional deposition.

14. The method of claim 13, wherein the directional deposition is by one of physical vapor deposition, sputtering, thermal CVD or a plasma enhanced method.

15. The method of claim 12, wherein the step of depositing further comprises selectively etching away passivating insulator deposited on sidewalls of the isolation trench.

16. The method of claim 12, wherein the passivating insulator comprises at least one of an oxide of silicon, a nitride of silicon, a mixture thereof or a mixed oxide and nitride of silicon.

17. The method of claim 12, wherein the step of filling fills the isolation trench at least to a level substantially flush with an upper surface of the silicon active layer.

18. The method of claim 12, wherein the passivating insulator provides a shield between the isolation trench and a lower portion of the silicon active layer.

19. The method of claim 12, wherein the dielectric trench isolation material comprises one or more of silicon dioxide, silicon nitride or silicon oxynitride.