Vertical power devices having insulated source electrodes in discontinuous deep trenches

• US 6,525,372 B2
• Filed: 11/05/2001
• Issued: 02/25/2003
• Est. Priority Date: 11/16/2000
• Status: Expired due to Term

• Current Assignee: Silicon Semiconductor Corporation
• Original Assignee: Silicon Wireless Corporation
• Inventors: Baliga, Bantval Jayant
• Primary Examiner(s): Chaudhuri; Olik
• Assistant Examiner(s): CIESLEWICZ, ANETA B
• Application Number:
  US09/991,838
• Publication Number:
  US 20020057610A1
• Time in Patent Office: 477 Days
• Field of Search: 256/510,513,335,401,339,328,329 438/412,404,424
• US Class Current: 257/328
• CPC Class Codes: H01L 2223/6627 Waveguides, e.g. microstrip line, strip line, coplanar line
• CPC Class Codes: H01L 2224/0603 Bonding areas having different sizes, e.g. different heights or widths
• CPC Class Codes: H01L 2224/06181 On opposite sides of the body
• CPC Class Codes: H01L 2224/371 with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
• CPC Class Codes: H01L 2224/40095 Kinked
• CPC Class Codes: H01L 2224/40245 the item being metallic
• CPC Class Codes: H01L 2224/73255 Bump and strap connectors
• CPC Class Codes: H01L 2224/73257 Bump and wire connectors
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 2224/84 using a strap connector
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/16 of an individual bump connector
• CPC Class Codes: H01L 24/37 of an individual strap connector
• CPC Class Codes: H01L 24/40 of an individual strap connector
• CPC Class Codes: H01L 24/41 of a plurality of strap connectors
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 27/088 : the components being field-effect transistors with insulated gate
• CPC Class Codes: H01L 29/0696 : of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/402 : Field plates
• CPC Class Codes: H01L 29/407 : Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/41741 : for vertical or pseudo-vertical devices
• CPC Class Codes: H01L 29/4238 : characterised by the surface lay-out
• CPC Class Codes: H01L 29/66712 : Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7802 : Vertical DMOS transistors, i.e. VDMOS transistors
• CPC Class Codes: H01L 29/7803 : structurally associated with at least one other device assemblies H01L25/00; integrated circuits H01L27/00
• CPC Class Codes: H01L 29/7813 : with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/1305 : Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/1306 : Field-effect transistor [FET]
• CPC Class Codes: H01L 2924/13063 : Metal-Semiconductor Field-Effect Transistor [MESFET]
• CPC Class Codes: H01L 2924/13091 : Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/1903 : including wave guides
• CPC Class Codes: H01L 2924/3011 : Impedance

Abstract

Vertical power devices include a semiconductor substrate having a first surface thereon and a drift region of first conductivity type therein. A quad arrangement of trenches are provided that extend into the first surface of the semiconductor substrate and define a drift region mesa therebetween. A base region of second conductivity type is included. The base region extends into the drift region and forms a first P-N rectifying junction therewith. A source region of first conductivity type is provided that extends into the base region and forms a second P-N rectifying junction therewith. A quad arrangement of insulated electrodes is provided in the quad arrangement of trenches. An insulated gate is provided on the drift region mesa. A source electrode is also provided that extends on the first surface. The source electrode is electrically connected to the source and base regions and to the quad arrangement of insulated electrodes.

Claims

1. A semiconductor switching device, comprising:

a semiconductor substrate having a first surface thereon and a drift region of first conductivity type therein;

a quad arrangement of trenches that extend into the first surface of said semiconductor substrate and define a drift region mesa therebetween;

a base region of second conductivity type that extends into the drift region and forms a first P-N rectifying junction therewith;

a source region of first conductivity type that extends into the base region and forms a second P-N rectifying junction therewith;

a quad arrangement of insulated electrodes in said quad arrangement of trenches;

an insulated gate on the drift region mesa; and

a source electrode that extends on the first surface and is electrically connected to said source and base regions and to said quad arrangement of insulated electrodes.

2. The device of claim 1, wherein said quad arrangement of trenches includes a first pair of trenches at a front of the device and a second pair of trenches at a rear of the device, when the device is viewed in transverse cross-section.

3. The device of claim 2, wherein said source region extends along the first surface in a lengthwise direction from the front to the rear of the device without interruption by said base region.

4. The device of claim 3, wherein said base region extends along the first surface in the lengthwise direction from a sidewall of a trench in the first pair to a sidewall of an opposing trench in the second pair.

5. The device of claim 4, wherein said source electrode ohmically contacts said source region and said base region along the first surface.

6. The device of claim 2, wherein a first distance between the first pair of trenches and the second pair of trenches equals a width of the drift region mesa as measured between the first pair of trenches.

7. The device of claim 6, wherein said source region extends along the first surface in a lengthwise direction from the front to the rear of the device without interruption by said base region.

8. The device of claim 7, wherein said base region extends along the first surface in the lengthwise direction from a sidewall of a trench in the first pair to a sidewall of an opposing trench in the second pair.

9. The device of claim 8, wherein said source electrode ohmically contacts said source region and said base region along the first surface.

10. A semiconductor switching device, comprising:

a semiconductor substrate having a first surface thereon and a drift region of first conductivity type therein;

a quad arrangement of trenches that extend into the first surface of said semiconductor substrate and define a drift region mesa therebetween;

a base region of second conductivity type that extends into the drift region and forms a first P-N rectifying junction therewith;

a source region of first conductivity type that extends into the base region and forms a second P-N rectifying junction therewith;

a quad arrangement of insulated electrodes in said quad arrangement of trenches;

an insulated gate electrode on the first surface;

a Faraday shield layer that extends on the first surface and surrounds said quad arrangement of trenches;

a source electrode that extends on the first surface and is electrically connected to said source and base regions, said quad arrangement of insulated electrodes and said Faraday shield layer.

11. The device of claim 10, further comprising:

a gate electrode strip line on said Faraday shield layer; and

an intermediate electrically insulating layer extending between said Faraday shield layer and said gate electrode strip line.

12. The device of claim 11, wherein said intermediate electrically insulating layer provides electrostatic discharge protection to the device.