Isolator for transmitting logic signals across an isolation barrier

• US 6,525,566 B2
• Filed: 06/01/2001
• Issued: 02/25/2003
• Est. Priority Date: 02/14/2000
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Chen, Baoxing, Haigh, Geoffrey T.
• Primary Examiner(s): LE, DON P
• Application Number:
  US09/872,779
• Publication Number:
  US 20020017919A1
• Time in Patent Office: 634 Days
• Field of Search: 326/82, 326/83, 326/86, 326/16, 326/26
• US Class Current: 326/82
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling
• CPC Class Codes: H04L 25/493 by transition coding, i.e. the time-position or direction of a transition being encoded before transmission

Abstract

A logic isolation circuit has a transmitter circuit for receiving a logic input signal and providing a periodic signal to an isolation barrier, and a receiving circuit for receiving the periodic signal from the isolation barrier and for providing an output signal that indicates the transitions in the logical input signal.

Claims

1. A method for transmitting a status or control logic signal across an isolation barrier comprising:

receiving the status or control logic signal, the logic signal including a first transition from a first state to a second state and a second transition from the second state to the first state;

a transmitter system including a first transmitter and a second transmitter for transmitting to the isolation barrier separate first and second signals that are representative of first and second transitions; and

a receiver system receiving from the isolation barrier the first and second signals, the receiving system includes a first receiver that receives signals from the first transmitter, a second receiver that receives signals from the second transmitter, and a bistable device, the first and second receivers providing signals indicating the occurrence of first and second transitions to the bistable device for providing an output signal based on the logic signal.

2. The method of claim 1, wherein the first signal has a change in response to the first transition and the second signal has a change in response to the second transition.

3. The method of claim 1, wherein the first signal is a continuous periodic signal with multiple periods beginning when the logic signal has the first transition and ending when the logic signal has the second transition, the continuous periodic signal thereby further indicating that the logic signal is in the second state.

4. The method of claim 3, wherein the second signal is a continuous periodic signal beginning when the logic signal has the second transition and ending when the logic signal has the first transition, the continuous periodic signal thereby further indicating that the logic signal is in the first state.

5. The method of claim 4, wherein the first signal is in a quiescent state during times when the second signal is a continuous periodic signal, and the second signal is in a quiescent state during times when the first signal is a continuous periodic signal.

6. The method of claim 1, wherein the first transmitter transmits a periodic signal with multiple periods in a short burst to indicate the first transition, and the second transmitter transmits a periodic signal with multiple periods in a short burst to indicate the second transition.

7. The method of claim 1, wherein transmitting to the isolation barrier includes transmitting to first and second sets of coils for coupling the signals.

8. The method of claim 1, wherein transmitting to the isolation barrier includes transmitting to first and second sets of capacitor plates.

9. The method of claim 1, wherein the transmitter system includes an inverter for receiving the control or logic signal, wherein the logic signal is provided to the first transmitter, and an inverted logic signal is provided to the second transmitter.

10. The method of claim 1, wherein the bistable device includes a flip-flop.

11. The method claim 1, wherein the first and second transmitters are substantially identical.

12. The method claim 11, wherein the first and second receivers are substantially identical.

13. The method of claim 1, wherein the first and second receivers are substantially identical.

14. A method for transmitting a status or control logic signal across an isolation barrier comprising:

receiving the status or control logic signal, the logic signal including a first transition from a first state to a second state and a second transition from the second state to the first state;

a transmitter system transmitting to the isolation barrier separate first and second signals that are representative of first and second transitions, the transmitter system includes a first transmitter and a second transmitter; and

a receiver system receiving from the isolation barrier the first and second signals, the receiving system includes a first receiver that receives signals from the first transmitter and a second receiver that receives signals from the second transmitter, the receiver system using the first and second signal to provide an output signal indicating the occurrence of first and second transitions; and

monitoring the first and second receivers and providing an error signal if the first and second receivers produce the same signals.

15. The method of claim 14, wherein the signals from the first and second receivers are provided to an output stage that provides the output signal.

16. The method of claim 14, wherein the first signal is a continuous periodic signal with multiple periods beginning when the logic signal has the first transition and ending when the logic signal has the second transition, the continuous periodic signal thereby further indicating that the logic signal is in the second state.

17. The method of claim 16, wherein the second signal is a continuous periodic signal beginning when the logic signal has the second transition and ending when the logic signal has the first transition, the continuous periodic signal thereby further indicating that the logic signal is in the first state.

18. The method of claim 17, wherein the first signal is in a quiescent state during times when the second signal is a continuous periodic signal, and the second signal is in a quiescent state during times when the first signal is a continuous periodic signal.

19. A logic isolator circuit comprising:

an isolation barrier;

a transmitter circuit receiving a control or status logic signal with logical transitions between a first state to a second state, the transmitter circuit providing to the isolation barrier separate first and second signals indicative of transitions;

a receiver circuit including a first receiver and a second receiver for receiving from the isolation barrier the first and second signals; and

an output coupled to the receiver circuit for providing an output status or control signal that indicates the logical transitions of the control or status logic signal received by the transmitter circuit, the output including a bistable device coupled to receive signals from the first and second receivers.

20. The circuit of claim 19, wherein the transmitter circuit includes a first transmitter, a second transmitter, and an inverter, the inverter for inverting the logic signal, the first transmitter for receiving the logic signal and the second transmitter for receiving the inverted logic signal.

21. The circuit of claim 20, wherein one of the first and second transmitter circuits transmits a periodic burst signal with multiple periods in response to receiving a transition.

22. The circuit of claim 21, wherein the other of the first and second transmitter circuits provides a quiescent signal while the one of the first and second transmitter circuits transmits the periodic signal.

23. The circuit of claim 20, wherein one of the first and second transmitters begins to transmit a periodic signal in response to receiving a transition in the logic signal and then continues to transmit the periodic signal as long as the logic signal is in a same state that it was after the transition.

24. The circuit of claim 23, wherein the other of the first and second transmitters circuits provides a quiescent signal while the one of the first and second transmitters transmits the periodic signal.

25. The circuit of claim 19, wherein the isolation barrier includes one or more sets of coils.

26. The circuit of claim 19, wherein the isolation barrier includes one or more sets of capacitor plates.

27. The circuit of claim 19, further comprising a monitoring circuit for monitoring the first and second receivers and providing an error signal if the first and second receivers produce the same output.

28. The circuit of claim 19, wherein the first and second transmitters are substantially identical.

29. The circuit of claim 19, wherein the first and second receivers are substantially identical.

30. A method for transmitting a status or control logic signal across an isolation barrier comprising:

receiving the status or control logic signal, the logic signal including a first transition from a first state to a second state and a second transition from the second state to the first state;

a transmitter system transmitting to the isolation barrier a periodic signal with multiple periods in a short burst to indicate the first transition; and

a receiver system receiving from the isolation barrier the periodic signal and using the periodic signal to provide an output signal indicating the occurrence of the first transitions.

31. The method of claim 30, wherein the transmitter system transmits separate first and second signals that are representative of first and second transitions, the transmitter system includes a first transmitter and a second transmitter.

32. The method of claim 31, wherein the receiver system receives the first and second signals, the receiving system includes a first receiver that receives signals from the first transmitter and a second receiver that receives signals from the second transmitter.

33. A circuit for transmitting a logic signal across an isolation barrier comprising a transmitter for receiving a control or status logic signal that includes a first transition from a first state to a second state and a second transition from the second state to the first state and for transmitting signals indicative of the transitions, the transmitter including a first transmitter, a second transmitter, and an inverter for providing the logic signal to the first transmitter, and the inverted logic signal to the second transmitter.

34. The circuit method of claim 33, wherein the transmitters each transmit a periodic signal in response to a transition in the logic signal.

35. A logic isolation system comprsing:

a chip including a substrate;

an isolation barrier including coils formed on the chip;

a transmitter for receiving a control or status logic signal that includes a first transition from a first state to a second state and a second transition from the second state to the first state, the transmitter transmitting to the isolation barrier periodic signals indicative of the transitions; and

a receiver for receiving periodic signals from the isolation barrier and using the periodic signals to provide an output signal indicating the transitions.

36. The circuit of claim 35, wherein the transmitter circuit includes a first transmitter, a second transmitter, and an inverter, the inverter for inverting the logic signal, the first transmitter for receiving the logic signal and the second transmitter for receiving the inverted logic signal.

37. The circuit of claim 36, wherein one of the first and second transmitter circuits transmits a periodic burst signal with multiple periods in response to receiving a transition.

38. The circuit of claim 36, wherein one he first and second transmitter circuits provides a quiescent signal while the other of the first and second transmitter circuits transmits the periodic signal.

39. The circuit of claim 35, wherein the signals transmitted by the transmitter are periodic signals.

40. The circuit of claim 35, wherein the signals received by the receiver are periodic signals.

41. The circuit of claim 35, wherein the transmitter and receiver are each formed on the chip.