Graphics processor with pipeline state storage and retrieval

• US 6,525,737 B1
• Filed: 08/20/1999
• Issued: 02/25/2003
• Est. Priority Date: 08/20/1998
• Status: Expired due to Term

• Current Assignee: Apple Inc.
• Original Assignee: Apple Computer Incorporated (Apple Inc.)
• Inventors: Duluk, Jerome F. Jr., Bratt, Joseph P., Go, Shun Wai, Hessel, Richard E., Benkual, Jack, Trivedi, Sushma S.
• Primary Examiner(s): Zimmerman, Mark
• Assistant Examiner(s): Monestime, Mackly
• Application Number:
  US09/378,439
• Time in Patent Office: 1,285 Days
• Field of Search: 345/506, 345/505, 345/504, 345/502, 345/503, 345/419
• US Class Current: 345/506
• CPC Class Codes: G06T 1/60 Memory management
• CPC Class Codes: G06T 11/001 Texturing; Colouring; Generation of texture or colour inpainting G06T5/77
• CPC Class Codes: G06T 11/40 Filling a planar surface by adding surface attributes, e.g. colour or texture
• CPC Class Codes: G06T 15/005 General purpose rendering architectures
• CPC Class Codes: G06T 15/04 Texture mapping
• CPC Class Codes: G06T 15/20 Perspective computation
• CPC Class Codes: G06T 15/30 Clipping
• CPC Class Codes: G06T 15/40 Hidden part removal
• CPC Class Codes: G06T 15/50 Lighting effects
• CPC Class Codes: G06T 15/80 Shading
• CPC Class Codes: G06T 15/83 Phong shading
• CPC Class Codes: G06T 15/87 Gouraud shading

Abstract

A deferred graphics pipeline processor comprised of a mode extraction unit and a Polygon Memory associated with the polygon unit. The mode extraction unit receives a data stream from a geometry unit and separates the data stream into vertices data, and non-vertices data which is sent to the Polygon Memory for storage. A mode injection unit receives inputs from the Polygon Memory and communicates the mode information to one or more other processing units. The mode injection unit maintains status information identifying the information that is already cached and not sending information that is already cached, thereby reducing communication bandwidth.

Claims

1. A 3D graphics pipeline for generating a rendered image from a plurality of graphics primitives, the pipeline comprising:

first logic maintaining current pipeline state information, the current pipeline state information divided into a plurality of state partitions;

second logic indicating one or more changed state partitions, the changed state partitions being one or more of the state partitions in which the stored pipeline state information has changed;

a first memory storage storing a multiplicity of the changed state partitions;

third logic generating associations between the graphics primitives and corresponding stored state partitions;

fourth logic determining when one or more of the stored changed state partitions is needed by one or more other units in the graphics pipeline; and

fifth logic retrieving one or more of the stored changed state partitions from the first memory partition by using the generated associations.

2. The 3D graphics pipeline of claim 1, further comprising:

a second memory storage storing spatial data of the primitives;

a third memory storage storing non-spatial data of the primitives; and

a sixth logic generating associations between the spatial data of the primitives and the non-spatial data of the primitives.

3. The 3D graphics pipeline of claim 2, further comprising:

a seventh logic spatially sorting the primitives according to a set of tiles within the image, the tiles being regions within the image, the seventh logic generating a list for each of the tiles of the stored primitives that overlap the tiles.

4. The 3D graphics pipeline of claim 2, further comprising:

a polygon memory comprising the first memory storage and the third memory storage; and

a sort memory comprising the second memory storage.

5. The 3D graphics pipeline of claim 4, further comprising:

the polygon memory being multiply buffered; and

the sort memory being multiply buffered.

6. The 3D graphics pipeline of claim 2, further comprising:

a single physical memory array comprising;

the first memory storage;

the second memory storage; and

the third memory storage.

7. The 3D graphics pipeline of claim 2, wherein the sixth logic further comprises:

logic generating a set of pointers for each primitive, each of the sets of pointers used for locating the non-spatial data of the primitives, the set of pointers comprising an address and an offset.

8. The 3D graphics pipeline of claim 1, wherein the first logic further comprises:

a fourth memory storage storing the current pipeline state information; and

logic receiving a data packet of variable width, the packet comprising data to be written into the fourth memory storage and an address into the fourth memory storage.

9. The 3D graphics pipeline of claim 1, further comprising:

the first logic further comprising logic maintaining at least some of the plurality of state partitions in front-back pairs in which only one partition in each pair is relevant for a particular one of the primitives; and

the third logic further comprising logic generating associations between each of the graphics primitives and precisely one of the two state partitions in each of the front-back pairs of state partitions.

10. The 3D graphics pipeline of claim 1, further comprising:

an eighth logic receiving labels attached to corresponding state partitions, the labels used to refer to a plurality of labeled state partitions, thereby reducing the amount of data fed into the pipeline.

11. The 3D graphics pipeline of claim 1, wherein the current pipeline state information further comprises software instructions that are executed by processors within the 3D graphics pipeline.

12. The 3D graphics pipeline of claim 1, wherein the second logic further comprises:

a plurality of dirty flags, each of the dirty flags corresponding to one of the state partitions, each dirty flag indicating whether the corresponding state partition has changed since the last time the corresponding state partition was stored.

13. The 3D graphics pipeline of claim 1, wherein the second logic further comprises:

comparators comparing at least some of an incoming pipeline state information to at least some of the current pipeline state information.

14. The 3D graphics pipeline of claim 1, wherein the third logic further comprises:

logic generating a set of pointers, each of the pointers used for locating one of the state partitions in the first memory storage, and the set of pointers being shared amongst a plurality of the primitives.

15. The 3D graphics pipeline of claim 1, further comprising:

a plurality of data cache memories storing pieces of the pipeline state information in the retrieved state partitions so that the number of times state partitions are retrieved from the first memory storage is reduced as compared to a pipeline not storing pieces of the pipeline state information in the retrieved state partitions.

16. The 3D graphics pipeline of claim 15, wherein the fourth logic further comprises:

a plurality of tag memories storing a unique identifier for each of the pieces of pipeline state information that are cached in one of the data cache memories; and

logic inputting the unique identifiers into one or more of the tag memories to determine which pieces of the pipeline state information are missing from the data caches.

17. The 3D graphics pipeline of claim 16, wherein the fifth logic further comprises:

logic retrieving the missing pipeline state information and sending the retrieved pipeline state information down the pipeline ahead of associated graphics primitives for storage into the data caches, thereby guaranteeing the retrieved pipeline state information is residing in the data caches at the time it is needed.

18. The 3D graphics pipeline of claim 1, further comprising:

ninth logic performing hidden surface removal to cull out parts of the primitives that definitely do not contribute to the final rendered image.

19. The 3D graphics pipeline of claim 1, wherein a plurality of the first logic, second logic, and third logic are organized into a plurality mode extraction units supporting a plurality of graphics rendering contexts, each of the rendering contexts generating a different rendered image, thereby providing a low cost for switching between contexts.

20. A computing system for 3-D graphics rendering, generating a final rendered image, the system comprising:

a general-purpose computer having a host processor;

host memory coupled to the general purpose computer; and

a 3-D graphics processor, the 3-D graphics processor comprising;

first logic maintaining current pipeline state information, the current pipeline state information divided into a plurality of state partitions;

second logic indicating one or more changed state partitions, the changed state partitions being one or more of the state partitions in which the stored pipeline state information has changed;

a first memory storage storing a multiplicity of the changed state partitions;

third logic generating associations between the graphics primitives and corresponding stored state partitions;

fourth logic determining when one or more of the stored changed state partitions is needed by one or more other units in the graphics processor; and

fifth logic retrieving one or more of the stored changed state partitions from the first memory partition by using the generated associations.

21. The system of claim 20, the 3D graphics processor further comprising:

a second memory storage storing spatial data of the primitives;

a third memory storage storing non-spatial data of the primitives; and

a sixth logic generating associations between the spatial data of the primitives and the non-spatial data of the primitives.

22. A computer program for use in conjunction with a computer system, the computer program comprising a computer program mechanism embedded therein, the computer program mechanism, comprising:

a program module that directs the rendering of a digital representation of a graphics image from a plurality of graphics primitives, to function in a specified manner, storing the final graphics image into a frame buffer memory, the program module including instructions for;

maintaining current pipeline state information, the current pipeline state information divided into a plurality of state partitions;

indicating one or more changed state partitions, the changed state partitions being one or more of the state partitions in which the current pipeline state information has changed;

storing a multiplicity of the changed state partitions;

generating associations between the graphics primitives and corresponding stored state partitions;

determining when one or more of the stored changed state partitions is needed to process one of the graphics primitives; and

retrieving one or more of the stored changed state partitions by using the generated associations.