Hardware only transmission control protocol segmentation for a high performance network interface card

• US 6,526,446 B1
• Filed: 04/27/1999
• Issued: 02/25/2003
• Est. Priority Date: 04/27/1999
• Status: Expired due to Term

• Current Assignee: Hewlett Packard Enterprise Development LP (Hewlett-Packard Enterprise Company)
• Original Assignee: 3Com Corporation (HP Inc.)
• Inventors: Traber, Rich, Wang, Chi-Le, Yang, Li-Jau
• Primary Examiner(s): Maung, Zarni
• Assistant Examiner(s): FLYNN, KIMBERLY D
• Application Number:
  US09/300,537
• Time in Patent Office: 1,400 Days
• Field of Search: 709/230, 709/250, 709/203, 370/389
• US Class Current: 709/230
• CPC Class Codes: H04L 49/90 Buffering arrangements
• CPC Class Codes: H04L 69/16 Implementation or adaptation of Internet protocol [IP], of transmission control protocol [TCP] or of user datagram protocol [UDP]
• CPC Class Codes: H04L 69/161 Implementation details of TCP/IP or UDP/IP stack architecture; Specification of modified or new header fields
• CPC Class Codes: H04L 69/163 In-band adaptation of TCP data exchange; In-band control procedures
• CPC Class Codes: H04L 69/166 IP fragmentation; TCP segmentation
• CPC Class Codes: H04L 69/22 Parsing or analysis of headers
• CPC Class Codes: H04L 9/40 Network security protocols

Abstract

Hardware only transmission control protocol segmentation for a high performance network interface card. Specifically, one embodiment of the present invention includes a circuit for implementing transmission control protocol (TCP) segmentation. The circuit includes a segmentation circuit coupled to receive a descriptor from a host device which corresponds to data. The segmentation circuit utilizes the descriptor to generate other descriptors that describe each frame segment. Furthermore, the circuit also includes a data download circuit coupled to the segmentation circuit to receive the frame segment descriptors. Specifically, the data download circuit retrieves the data from a memory. Moreover, the circuit includes a medium access control circuit coupled to the data download circuit to receive the data in a frame segment.

Claims

1. A circuit for implementing transmission control protocol segmentation, said circuit comprising:

a segmentation circuit coupled to receive a descriptor from a host device which corresponds to data, said segmentation circuit utilizes said descriptor to generate a frame segment descriptor;

a data download circuit coupled to said segmentation circuit to receive said frame segment descriptor, said data download circuit retrieves said data from a memory; and

a medium access control circuit coupled to said data download circuit to receive said data in a frame segment.

2. A circuit as described in claim 1 further comprising a retriever circuit coupled to said host device and said segmentation circuit, said retriever circuit for retrieving said descriptor from said host device.

3. A circuit as described in claim 2 wherein said retriever circuit comprises a descriptor direct memory access circuit.

4. A circuit as described in claim 1 further comprising a modification circuit coupled to said data download circuit to receive information of said frame segment, said modification circuit modifies header information within said frame segment.

5. A circuit as described in claim 1 wherein said circuit is disposed on a peripheral component.

6. A circuit as described in claim 5 wherein said peripheral component comprises a network interface card.

7. A circuit as described in claim 1 wherein said data is to be transmitted by said circuit.

8. A circuit as described in claim 1 further comprising a local memory coupled to said data download circuit and said medium access control circuit, wherein said data is stored within said local memory before being transmitted by said medium access control circuit.

9. A circuit as described in claim 1 wherein segmentation circuit performs a transmission control protocol (TCP) segmentation.

10. A circuit as described in claim 1 wherein said frame segment comprises a transmission control protocol (TCP) header.

11. A circuit as described in claim 1 wherein said frame segment comprises an internet protocol (IP) header.

12. A circuit as described in claim 1 wherein said memory is part of said host device.

13. A circuit as described in claim 1 wherein said segmentation circuit comprises a state machine.

14. A circuit as described in claim 1 wherein said data download circuit comprises a data download direct memory access circuit.

15. A system for implementing transmission control protocol segmentation, said system comprising:

a host device comprising;

a host driver for preparing a first signal; and

a host memory;

a circuit implementing transmission control protocol segmentation, said circuit comprising;

a retriever circuit coupled to receive said first signal from said host device which indicates where a descriptor is located within said host memory, said retriever circuit retrieves said descriptor which describes data stored within said host memory;

a segmentation circuit coupled to said retriever circuit to receive said descriptor, said segmentation circuit utilizes said descriptor to generate a frame segment descriptor;

a data download circuit coupled to said segmentation circuit to receive said frame segment descriptor, said data download circuit retrieves said data from said host memory; and

a medium access control circuit coupled to said data download circuit to receive said data in a frame segment.

16. A system as described in claim 15 further comprising a modification circuit coupled to said data download circuit to receive information of said frame segment, said modification circuit modifies header information within said frame segment.

17. A system as described in claim 15 wherein said host device comprises a computer.

18. A system as described in claim 15 further comprising a local memory coupled to said data download circuit and said medium access control circuit, said data is stored within said local memory.

19. A system as described in claim 15 wherein said segmentation circuit performs a transmission control protocol (TCP) segmentation.

20. A system as described in claim 15 wherein said frame segment comprises a transmission control protocol (TCP) header.

21. A system as described in claim 15 wherein said frame segment comprises an internet protocol (IP) header.

22. A system as described in claim 15 wherein said retriever circuit comprises a descriptor direct memory access circuit.

23. A system as described in claim 15 wherein said circuit is disposed on a peripheral component.

24. A system as described in claim 23 wherein said peripheral component comprises a network interface card.

25. A system as described in claim 15 wherein said data download circuit comprises a data download direct memory access circuit.

26. A method for implementing transmission control protocol segmentation within hardware, said method comprising the hardware implemented steps of:

(a) receiving from a host device a descriptor signal which corresponds to data stored within memory;

(b) using said descriptor signal to generate a frame segment descriptor using a segmentation circuit; and

(c) receiving said data from said memory using a data download circuit.

27. A method for implementing transmission control protocol segmentation within hardware as described in claim 26 further comprising the step of:

(d) transmitting said data using a medium access control circuit.

28. A method for implementing transmission control protocol segmentation within hardware as described in claim 27 wherein said step (d) comprises:

transmitting said data using said medium access control circuit, wherein said medium access control circuit is disposed on a peripheral component.

29. A method for implementing transmission control protocol segmentation within hardware as described in claim 27 wherein said step (d) comprises:

transmitting said data using said medium access control circuit, wherein said medium access control circuit is disposed on a network interface card.

30. A method for implementing transmission control protocol segmentation within hardware as described in claim 26 wherein said step (a) comprises:

receiving from said host device said descriptor signal, wherein said host device comprises a computer.

31. A method for implementing transmission control protocol segmentation within hardware as described in claim 26 wherein said step (b) comprises:

using said descriptor signal to generate said frame segment descriptor, wherein said frame segment descriptor comprises a transmission control protocol (TCP) header.

32. A method for implementing transmission control protocol segmentation within hardware as described in claim 26 wherein said step (b) comprises:

using said descriptor signal to generate said frame segment descriptor, wherein said frame segment descriptor comprises an internet protocol (IP) header.

33. A method for implementing transmission control protocol segmentation within hardware as described in claim 26 wherein said step (b) comprises:

using said descriptor signal to generate said frame segment descriptor, wherein said frame segment descriptor is generated using a transmission control protocol (TCP) segmentation process.