Evolutionary technique for automated synthesis of electronic circuits

• US 6,526,556 B1
• Filed: 06/07/2000
• Issued: 02/25/2003
• Est. Priority Date: 09/13/1999
• Status: Expired due to Fees

• Current Assignee: United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
• Original Assignee: United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration
• Inventors: Stoica, Adrian, Salazar-Lazaro, Carlos Harold
• Primary Examiner(s): Siek, Vuthe
• Application Number:
  US09/591,386
• Time in Patent Office: 993 Days
• Field of Search: 716/16, 716/17, 716/1, 706/13
• US Class Current: 716/117
• CPC Class Codes: G06F 30/36 Circuit design at the analogue level
• CPC Class Codes: G06N 3/126 Evolutionary algorithms, e.g. genetic algorithms or genetic programming

Abstract

A method for evolving a circuit comprising configuring a plurality of transistors using a plurality of reconfigurable switches so that each of the plurality of transistors has a terminal coupled to a terminal of another of the plurality of transistors that is controllable by a single reconfigurable switch. The plurality of reconfigurable switches being controlled in response to a chromosome pattern. The plurality of reconfigurable switches may be controlled using an annealing function. As such, the plurality of reconfigurable switches may be controlled by selecting qualitative values for the plurality of reconfigurable switches in response to the chromosomal pattern, selecting initial quantitative values for the selected qualitative values, and morphing the initial quantitative values. Typically, subsequent quantitative values will be selected more divergent than the initial quantitative values. The morphing process may continue to partially or to completely polarize the quantitative values.

Claims

1. A method for evolving a circuit comprising:

a) configuring a plurality of transistors using a plurality of reconfigurable switches so that each of the plurality of transistors has a terminal coupled to a terminal of another of the plurality of transistors such that a single reconfigurable switch controls respective couplings therebetween; and

b) controlling the plurality of reconfigurable switches in response to a chromosome pattern.

2. claim 1 wherein controlling the plurality of reconfigurable switches further comprises using an annealing function.

3. claim 2 wherein controlling the plurality of reconfigurable switches comprises:

a) selecting qualitative values for the plurality of reconfigurable switches in response to the chromosomal pattern;

b) selecting initial quantitative values for the selected qualitative values; and

c) morphing the initial quantitative values.

4. claim 3 further comprising evaluating circuit fitness in response to morphed quantitative values.

5. claim 4 wherein morphing comprises selecting quantitative values more divergent than the initial quantitative values.

6. claim 5 wherein morphing comprises completely polarizing the qualitative values.

7. claim 5 wherein morphing comprises partially polarizing the qualitative values.

8. claim 5 wherein selecting initial quantitative values for the qualitative values comprises selecting quantitative values within two orders of magnitude.

9. claim 8 wherein selecting initial quantitative values for the qualitative values comprises selecting quantitative values within an order of magnitude.

10. claim 9 wherein morphing comprises completely polarizing the qualitative values.

11. claim 5 wherein morphing comprises providing a sufficient number of generations to ensure a gradual change in circuit response.

12. claim 2 wherein controlling the plurality of reconfigurable switches comprises homogeneously controlling the plurality of reconfigurable switches.

13. claim 2 wherein controlling the plurality of reconfigurable switches comprises heterogenously controlling the plurality of reconfigurable switches.

14. A method for evolving a circuit comprising:

a) coupling a plurality of transistors with a plurality of reconfigurable switches so that each of the plurality of transistors within a region of the circuit is coupled via a single reconfigurable switch to a terminal of another of the plurality of transistors; and

b) controlling the plurality of reconfigurable switches in response to a chromosome pattern.

15. claim 14 wherein controlling the plurality of reconfigurable switches further comprises using an annealing function.

16. claim 15 wherein controlling the plurality of reconfigurable switches comprises:

a) selecting qualitative values for the plurality of reconfigurable switches in response to the chromosomal pattern;

b) selecting initial quantitative values for the selected qualitative values; and

c) morphing the initial quantitative values.

17. claim 16 further comprising evaluating circuit fitness in response to morphed quantitative values.

18. claim 17 wherein morphing comprises selecting quantitative values more divergent than the initial quantitative values.

19. claim 18 wherein morphing comprises completely polarizing the qualitative values.

20. claim 18 wherein morphing comprises partially polarizing the qualitative values.

21. claim 18 wherein selecting initial quantitative values for the qualitative values comprises selecting quantitative values within two orders of magnitude.

22. claim 21 wherein selecting initial quantitative values for the qualitative values comprises selecting quantitative values within an order of magnitude.

23. claim 22 wherein morphing comprises completely polarizing the qualitative values.

24. claim 18 wherein morphing comprises providing a sufficient number of generations to ensure a gradual change in circuit response.

25. claim 15 wherein controlling the plurality of reconfigurable switches comprises homogeneously controlling the plurality of reconfigurable switches.

26. claim 15 wherein controlling the plurality of reconfigurable switches comprises heterogenously controlling the plurality of reconfigurable switches.

27. A method for evolving a circuit comprising:

a) configuring a plurality of transistors between a power source and a power sink with a plurality of reconfigurable switches so that each of at least two terminals of each of the plurality of transistors within a region of the circuit are coupled via a single reconfigurable switch to a terminal of another of the plurality of transistors;

b) selecting qualitative values for the plurality of reconfigurable switches in response to a chromosomal pattern;

c) selecting initial quantitative values for the selected qualitative values;

d) morphing the initial quantitative values; and

e) evaluating a fitness of the circuit in response to morphed quantitative values of the chromosomal pattern.

28. claim 27 wherein morphing comprises completely polarizing the qualitative values.

29. claim 27 wherein morphing comprises partially polarizing the qualitative values.

30. claim 27 wherein selecting initial quantitative values for the qualitative values comprises selecting quantitative values within two orders of magnitude.

31. claim 30 wherein selecting initial quantitative values for the qualitative values comprises selecting quantitative values within an order of magnitude.

32. claim 31 wherein morphing comprises completely polarizing the qualitative values.

33. claim 27 wherein morphing comprises providing a sufficient number of generations.to ensure a gradual change in circuit response.

34. claim 27 wherein controlling the plurality of reconfigurable switches comprises homogeneously controlling the plurality of reconfigurable switches.

35. claim 27 wherein controlling the reconfigurable switches comprises heterogenously controlling the plurality of reconfigurable switches.