Substrate planarization with a chemical mechanical polishing stop layer
First Claim
1. A method for planarizing a surface of a semiconductor substrate, the method comprising:
- a) forming a PAD oxide layer on a silicon substrate wafer;
b) depositing on said PAD oxide layer a first stop layer;
c) defining active and trench regions in the substrate wafer by etching using an active mask image;
d) applying a filler layer across the substrate wafer surface;
e) applying a second stop layer on top of the filler layer;
f) etching through the second stop layer with a reverse mask image of the active mask image, the reverse mask image causing the second stop layer to be located over the entire trench regions, but not be located over the active regions; and
g) polishing the substrate surface with chemical mechanical until the first stop layer is encountered.
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Abstract
This invention comprises an improved method of planarizing, an integrated circuit formed onto a semiconductor substrate and the planarized semiconductor substrate. Improved planarity is accomplished through the use a first and second stop layer separated by a filler layer. A first stop layer is used to define active and trench regions. A filler layer is then applied over the surface of the substrate and a second stop layer is applied on top of the filler layer. The second stop layer is patterned through etching. The pattern etched into the second stop layer is used to control chemical mechanical polishing that planarizes the surface. Patterns can be a reverse image of an active mask or a continuous pattern. In addition CMP can be used to create a condition of equilibrium planarity before the second stop layer is applied. The stop layers can comprise polysilicon, silicon nitride, or another material that is harder than a dielectric oxide material used as filler material. In addition a polysilicon stop layer may be exposed to a thermal cycle and oxidized into silicon dioxide after some degree of planarization to further regulate chemical mechanical polishing.
121 Citations
14 Claims
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1. A method for planarizing a surface of a semiconductor substrate, the method comprising:
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a) forming a PAD oxide layer on a silicon substrate wafer;
b) depositing on said PAD oxide layer a first stop layer;
c) defining active and trench regions in the substrate wafer by etching using an active mask image;
d) applying a filler layer across the substrate wafer surface;
e) applying a second stop layer on top of the filler layer;
f) etching through the second stop layer with a reverse mask image of the active mask image, the reverse mask image causing the second stop layer to be located over the entire trench regions, but not be located over the active regions; and
g) polishing the substrate surface with chemical mechanical until the first stop layer is encountered. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification