Test structures and methods for inspection of semiconductor integrated circuits
First Claim
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1. A method of forming a semiconductor die having a scanning area, the method comprising:
- forming a first plurality of test structures entirely within the scanning area;
forming a second plurality of test structures partially within the scanning area; and
scanning the scanning area with an electron beam to detect defects outside of the scanning area.
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Abstract
Disclosed is a semiconductor die having a scanning area. The semiconductor die includes a first plurality of test structures wherein each of the test structures in the first plurality of test structures is located entirely within the scanning area. The semiconductor die further includes a second plurality of test structures wherein each of the test structures in the first plurality of test structures is located only partially within the scanning area. The test structures are arranged so that a scan of the scanning area results in detection of defects outside of the scanning area.
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Citations
19 Claims
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1. A method of forming a semiconductor die having a scanning area, the method comprising:
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forming a first plurality of test structures entirely within the scanning area;
forming a second plurality of test structures partially within the scanning area; and
scanning the scanning area with an electron beam to detect defects outside of the scanning area. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19)
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Specification