CMOS active pixel for improving sensitivity

• US 6,528,833 B2
• Filed: 06/19/2001
• Issued: 03/04/2003
• Est. Priority Date: 06/20/2000
• Status: Expired due to Fees

• Current Assignee: Pixelplus Co., Ltd.
• Original Assignee: Pixelplus Co., Ltd.
• Inventors: Min, Dae Sung, Lee, Seo Kyu
• Primary Examiner(s): Flynn, Nathan J.
• Assistant Examiner(s): Sefer, Ahmed N.
• Application Number:
  US09/883,493
• Publication Number:
  US 20020020863A1
• Time in Patent Office: 623 Days
• Field of Search: 257/292, 257/291, 257/233, 257/290, 257/369
• US Class Current: 257/292
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70

Abstract

A CMOS active pixel of increased sensitivity includes a floating diffusion layer, a photo-diode, a reset circuit and an output circuit The floating diffusion layer is of a first dopant type and receives a signal charge. The photo-diode generates the signal charge depending on an energy inputted thereto and transfers the signal charge to the floating diffusion layer. The photo-diode has first and second lower diode dopant layers of the first dopant type and an upper diode dopant layer of a second dopant type. The polarity of the second dopant type is opposite to that of the first dopant type. The first and second lower diode dopant layers are formed to contact a lower portion of the upper diode dopant layer. The upper diode dopant layer and the first lower diode dopant layer are formed to contact the floating diffusion layer. The second lower diode dopant layer is formed to contact the first lower diode dopant layer. The reset circuit controls a voltage level of the floating diffusion layer to a reset voltage level in response to a control signal. A doping concentration of the first lower diode dopant layer is less than that of the floating diffusion layer. A doping concentration of the second lower diode dopant layer is less than that of the first lower diode dopant layer.

Claims

1. A CMOS active pixel formed on a semiconductor substrate, comprising:

a floating diffusion layer of a first dopant type, the floating diffusion layer receiving a signal charge;

a photo-diode for generating the signal charge and transferring the signal charge to the floating diffusion layer, the photo-diode having a first lower diode dopant layer and a second lower diode dopant layer, each of the first dopant type, and an upper diode dopant layer of a second dopant type, the polarity of the second dopant type being opposite to that of the first dopant type, the upper diode dopant layer being formed on both the first and the second lower diode dopant layer, the first lower diode dopant layer being formed between the floating diffusion layer and the second lower dopant layer;

a reset means controlling a voltage level of the floating diffusion layer to a reset voltage level in response to a control signal; and

an output means generating an output signal corresponding to the voltage level of the floating diffusion layer,

wherein the polarity of the semiconductor substrate is that of the second dopant type,

wherein the upper diode dopant layer is electrically connected with the semiconductor substrate,

wherein an electric potential energy of the first lower diode dopant layer is higher than that of the floating diffusion layer in an initial state of the photo-diode, and

wherein the second lower diode dopant layer has a higher electric potential than does the first lower diode dopant layer in the initial state of the photo-diode.

2. The CMOS active pixel in accordance with claim 1, wherein the first lower diode dopant layer has a lower concentration of dopant than does the floating diffusion layer, and

the second lower diode dopant layer has a lower concentration of dopant than does the first lower diode dopant layer.

3. The CMOS active pixel in accordance with claim 2, wherein the first dopant type is N-type and the second dopant type is P-type.

4. The CMOS active pixel in accordance with claim 2, wherein a portion of the floating diffusion layer is formed in a well of the second dopant type.

5. The CMOS active pixel in accordance with claim 4, the upper diode dopant layer has a greater concentration of dopant than does the well.

6. A CMOS active pixel formed on a semiconductor substrate, comprising:

a floating diffusion layer of a first dopant type, the floating diffusion layer receiving a signal charge;

a photo-diode for generating the signal charge and transferring the signal charge to the floating diffusion layer, the photo-diode including;

a lower diode dopant layer of the first dopant type,

a separating layer, the separating layer being formed between the lower diode dopant layer and the floating diffusion layer, and

an upper diode dopant layer of a second dopant type, the polarity of the second dopant type being opposite to that of the first dopant layer, the upper diode dopant layer being formed on the lower diode dopant layer and the separating layer;

a reset means controlling a voltage level of the floating diffusion layer to a reset voltage level in response to a control signal; and

an output means generating an output signal corresponding to the voltage level of the floating diffusion layer,

wherein the polarity of the semiconductor substrate is that of the second dopant type,

wherein the upper diode dopant layer is electrically connected with the semiconductor substrate, and

wherein the separating layer has a higher electric potential than does the floating diffusion layer in an initial state of the photo-diode.

7. The CMOS active pixel in accordance with claim 6, wherein the first dopant type is N-type and the second dopant type is P-type.