Capacitance level measurement circuit and system

• US 6,529,017 B2
• Filed: 04/13/2001
• Issued: 03/04/2003
• Est. Priority Date: 04/14/2000
• Status: Expired due to Term

• Current Assignee: Invensys Systems Incorporated (Invensys PLC)
• Original Assignee: Robertshaw Controls Company (Schneider Electric SE)
• Inventors: Tymoszuk, Stephen, Martin, Barry E., Lease, Benjamin N.
• Primary Examiner(s): Le, N.
• Assistant Examiner(s): KERVEROS, JAMES C
• Application Number:
  US09/835,272
• Publication Number:
  US 20020008526A1
• Time in Patent Office: 690 Days
• Field of Search: 324/658, 324/663, 324/669, 324/674, 324/677, 324/684, 324/686, 324/690, 324/659, 733/04.C
• US Class Current: 324/690
• CPC Class Codes: G01F 23/26 by measuring variations of capacity or inductance of capacitors or inductors arising from the presence of liquid or fluent solid material in the electric or electromagnetic fields
• CPC Class Codes: G01F 23/266 measuring circuits therefor
• CPC Class Codes: G01F 23/268 mounting arrangements of probes

Abstract

A capacitance measurement circuit and probe includes a drive circuit couplable to a constant-current source, a threshold detector, a probe capacitor, and a reference capacitor. The circuit includes a plurality of switches being actuatable to alternately couple the current source to the probe capacitor and to the reference capacitor. The drive circuit is configured to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of the probe capacitor and of the reference capacitor. The voltage differential between the probe capacitor and reference capacitor are actively nulled to nominally eliminate a parasitic capacitance therebetween.

Claims

1. A capacitance measurement circuit comprising:

a drive circuit including;

a power port couplable to a constant-current source;

a detector port couplable to a threshold detector;

a probe port couplable to a probe capacitor;

a reference port couplable to a reference capacitor;

a plurality of switches being actuatable to alternately couple said power port to said probe port and to said reference port;

said drive circuit being configured to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor coupled to said probe port and to said reference port; and

said drive circuit being configured to substantially eliminate parasitic capacitance between the reference capacitor and the probe capacitor.

2. The circuit of claim 1, comprising a constant-current source coupled to said power port.

3. The circuit of claim 1, comprising:

a probe capacitor coupled to said probe port; and

a reference capacitor coupled to said reference port.

4. The circuit of claim 3, wherein said probe capacitor comprises a pair of integral electrodes.

5. The circuit of claim 4, wherein said pair of integral electrodes are electrically isolated from a container into which said probe capacitor may be disposed.

6. The circuit of claim 4, wherein said reference capacitor comprises an other pair of integral electrodes.

7. The circuit of claim 6, wherein said other pair of integral electrodes are electrically isolated from a container into which said reference capacitor may be disposed.

8. The circuit of claim 6, wherein said probe capacitor and said reference capacitor comprise an integrated unit in which one electrode is common to both said pair, and to said other pair, of integral electrodes.

9. The circuit of claim 1, being configured to maintain a voltage differential of substantially zero volts between the reference capacitor and the probe capacitor.

10. The circuit of claim 1, further comprising a threshold detector coupled to said detector port, said threshold detector being configured to indicate when the linear ramp waveform reaches a threshold.

11. The circuit of claim 10, wherein the signal comprises a linear ramp voltage waveform in which the voltage varies linearly therealong, and said threshold detector is configured to indicate when the signal reaches a threshold voltage.

12. The circuit of claim 11, further comprising a timer to measure time elapsed between coupling said constant-current source to one of the probe and reference capacitors, and the signal reaching the threshold.

13. The circuit of claim 12, comprising a microprocessor configured to actuate said switches and to measure said time elapsed.

14. The circuit of claim 13, wherein said microprocessor is configured to calculate a level of material into which the probe capacitor is immersed.

15. The circuit of claim 14, wherein said microprocessor uses said magnitude of capacitance of the probe capacitor and reference capacitor to calculate the level of material.

16. The circuit of claim 15, wherein said microprocessor implements a ratiometric equation.

17. The circuit of claim 16, wherein said microprocessor implements the equation:

18. The circuit of claim 16, comprising computer readable program code configured to compensate for parasitic board capacitances.

19. The circuit of claim 18, wherein said computer readable program code comprises:

computer readable program code to determine a value of the parasitic board capacitances;

computer readable program code to store said value;

computer readable program code to retrieve said value during a measurement cycle; and

computer readable program code to incorporate said value to calculate the level of material.

20. The circuit of claim 18, wherein said computer readable program code implements the equation:

21. A capacitance probe comprising the capacitance measurement circuit of claim 1.

22. The probe of claim 21, comprising:

a constant-current source coupled to said power port;

a probe capacitor coupled to said probe port;

a reference capacitor coupled to said reference port;

a threshold detector coupled to said detector port, said threshold detector being configured to indicate when the linear ramp waveform reaches a threshold;

wherein said circuit is configured to maintain a voltage differential of substantially zero volts between the reference capacitor and the probe capacitor to substantially eliminate parasitic capacitance therebetween.

23. A capacitance measurement circuit comprising:

a constant-current source;

a threshold detector being configured to indicate when a linear ramp waveform reaches a threshold voltage;

a drive circuit coupled to said constant-current source and to said threshold detector, said drive circuit including;

a probe port couplable to a probe capacitor;

a reference port couplable to a reference capacitor;

a plurality of switches configured to alternately couple said constant-current source to said probe port and to said reference port;

said drive circuit being configured to generate the signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of the probe capacitor and reference capacitor alternatively coupled thereto; and

said drive circuit being configured to substantially eliminate parasitic capacitance between the reference capacitor and the probe capacitor.

24. A method of fabricating a capacitance measurement circuit, said method comprising:

providing a drive circuit including;

a power port couplable to a constant-current source;

a detector port couplable to a threshold detector;

a probe port couplable to a probe capacitor;

a reference port couplable to a reference capacitor;

a plurality of switches being actuatable to alternately couple said power port to said probe port and to said reference port;

configuring the drive circuit to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor coupled to said probe port and to said reference port, and;

configuring the drive circuit to substantially eliminate parasitic capacitance between the reference capacitor and the probe capacitor.

25. A method of determining the capacitance of a capacitance probe, said method comprising:

providing a drive circuit;

coupling a constant-current source to the drive circuit;

coupling a probe capacitor to the selection/drive circuit;

coupling a reference capacitor to the selection/drive circuit;

providing the selection/drive circuit with a plurality of switches being actuatable to alternately couple the constant-current source to the probe capacitor and to the reference capacitor;

configuring the drive circuit to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor coupled to said probe port and to said reference port;

actuating the switches to alternately couple the constant-current source to the probe capacitor and to the reference capacitor; and

using the drive circuit to alternately generate a signal of linear ramp waveform having a slope that is proportional to the magnitude of capacitance of a probe capacitor and reference capacitor; and

maintaining a voltage differential of substantially zero volts between the reference capacitor and the probe capacitor during said use of the drive circuit.