Instruction set for controlling a processor to convert linear data to logarithmic data in a single instruction that define the exponent filed of the logarithmic value

• US 6,529,922 B1
• Filed: 12/22/1998
• Issued: 03/04/2003
• Est. Priority Date: 07/02/1997
• Status: Expired due to Term

• Current Assignee: Creative Technology Ltd.
• Original Assignee: Creative Technology Ltd.
• Inventors: Hoge, Stephen
• Primary Examiner(s): EL HADY, NABIL M
• Application Number:
  US09/219,197
• Time in Patent Office: 1,533 Days
• Field of Search: 708/204, 708/495, 708/505, 708/200, 712/17, 712/220, 712/221
• US Class Current: 708/204
• CPC Class Codes: G06F 8/441 Register allocation; Assignment of physical memory space to logical memory space
• CPC Class Codes: G06F 9/3001 Arithmetic instructions
• CPC Class Codes: G06F 9/30018 Bit or string instructions
• CPC Class Codes: G06F 9/30029 Logical and Boolean instructions, e.g. XOR, NOT
• CPC Class Codes: G06F 9/30123 according to context, e.g. thread buffers
• CPC Class Codes: G06F 9/3013 according to data content, e.g. floating-point registers, address registers
• CPC Class Codes: G06F 9/3016 Decoding the operand specifier, e.g. specifier format
• CPC Class Codes: G06F 9/383 Operand prefetching cache prefetching G06F12/0862
• CPC Class Codes: G06F 9/384 Register renaming
• CPC Class Codes: G06F 9/3885 using a plurality of independent parallel functional units
• CPC Class Codes: G06F 9/5016 the resource being the memory

Abstract

An instruction set for control of an audio signal processor that allows for a high degree of flexibility in generating desired sound effects. The instruction set serves as a multi-functional instruction base upon which other specialized sound effects can be constructed.

Claims

1. A method for converting data from linear format to logarithmic format comprising the steps of:

receiving into a processor, an instruction, said instruction comprising;

an instruction opcode for directing said processor to convert a linear format of a number to a logarithmic format, said logarithmic format of said number including an exponent field and a mantissa field;

a first address for specifying a first operand comprising a linear format of said number; and

a second address for specifying a second operand, said second operand indicative of a desired exponent field width to hold a maximum exponent value; and

converting said linear format of said number to a logarithmic format, said logarithmic format including an exponent field having a width, said width being dependent upon said desired exponent filed width.

2. The method of claim 1, wherein said instruction is stored in a first memory separate from said first and second operands.

3. The method of claim 1, wherein said first address comprises a ten bit address field.

4. The method of claim 3, wherein said first operand comprises a thirty-two bit data field.

5. The method of claim 4, wherein said second address comprises a ten bit address field.

6. The method of claim 5, wherein said second operand comprises a thirty-two bit data field.

26. The method of claim 1, wherein said second operand is a desired maximum exponent value of said logarithmic format of said number, and wherein said width of said exponent field is a minimum number of bits required to represent said maximum exponent value.

7. A method for converting data from logarithmic format to linear format, the method comprising the steps of:

receiving into a processor, an instruction, said instruction comprising;

an instruction opcode for directing said processor to convert a logarithmic format of a number to a linear format;

a first address for specifying a first operand comprising a logarithmic format of said number, said logarithmic format of said number having an exponent field and a mantissa field; and

a second address for specifying a second operand, said second operand indicative of a width of said exponent field to hold a maximum possible exponent value; and

converting said logarithmic format of said number to a linear format, said linear format having a field of most significant bits, wherein the width of said field of most significant bits is dependent upon said width of said exponent field.

8. The method of claim 7, wherein said instruction is stored in a first memory separate from said first and second operands.

9. The method of claim 7, wherein said first address comprises a ten bit address field.

10. The method of claim 9, wherein said first operand comprises a thirty-two bit data field.

11. The method of claim 10, wherein said exponent field comprises a data field having between two and five bits inclusive.

12. The method of claim 10, wherein said mantissa field comprises a data field having between twenty-six to twenty-nine bits inclusive.

13. The method of claim 10, wherein said second address comprises a ten bit address field.

14. The method of claim 13, wherein said second operand comprises a thirty-two bit data field.

27. The method of claim 7, wherein said second operand is a maximum possible exponent value of said logarithmic format of said number, and wherein said width of said exponent field is a minimum number of bits required to represent said maximum

15. A processing unit for converting data from linear format to logarithmic format, the processing unit comprising:

a memory unit for storing an instruction comprising;

an instruction opcode for directing said processing unit to convert a linear format of a number to a logarithmic format, said logarithmic format of said number including an exponent field and a mantissa field;

a first address for specifying a first operand comprising a linear format of said number; and

a second address for specifying a second operand, said second operand indicative of a desired exponent field width to hold a maximum exponent value; and

an execution unit for converting said linear format of said number to a logarithmic format, said logarithmic format including an exponent field having a width, said width being dependent upon said desired exponent filed width.

16. The processing unit of claim 15, wherein said first and second operands each comprise a thirty-two bit data field.

17. A processing unit for converting data from logarithmic format to linear format, the processing unit comprising:

a memory unit for storing an instruction comprising

an instruction opcode, for directing said processing unit to convert a logarithmic format of a number to a linear format;

a first address for specifying a first operand comprising a logarithmic format of said number, said logarithmic format of said number having an exponent field and a mantissa field, and

a second address for specifying a second operand, said second operand indicative of a width of said exponent field to hold a maximum possible exponent value; and

an execution unit coupled to said memory unit for converting said logarithmic format of said numbers to a linear format, said linear format having a field of most significant bits, wherein a width of said field of most significant bits is dependent upon said width of said exponent field.

18. The processing unit of claim 17, wherein said first operand comprises a thirty-two bit data field, wherein said exponent field comprises a data field having between two and five bits inclusive and wherein said mantissa field comprises a data field having between twenty-six to twenty-nine bits inclusive.

19. A software product for use with a processor responsive to an instruction set, said software product comprising:

an instruction belonging to said instruction set for controlling said processor to convert data from linear format to logarithmic format, said instruction comprising;

an instruction opcode for directing said processor to convert a linear format of a number to a logarithmic format, said logarithmic format of said number including an exponent field and a mantissa field;

a first address for specifying said number in said linear format; and

a second address for specifying a desired width of said exponent field to hold a maximum exponent value of said logarithmic format; and

a computer readable storage medium for storing said instruction.

20. The software product of claim 19, wherein said linear data and said desired width of said exponent field each comprise a thirty-two bit data field.

21. The software product of claim 19, wherein said first and second address each comprise a ten bit address field.

22. A software product for use with a processor responsive to an instruction set, said software product comprising:

an instruction belonging to said instruction set for controlling said processor to convert data from logarithmic format to linear format, said instruction comprising;

an instruction opcode for directing said processor to convert a logarithmic format of a number to a linear format;

a first address for specifying said number in said logarithmic format, said logarithmic format of said number including an exponent field and a mantissa field; and

a second address for specifying a width of said exponent field to hold a maximum possible exponent value; and

a computer readable storage medium for strong said instruction.

23. The software product of claim 22, wherein said exponent field and mantissa field comprises a thirty-two bit data field.

24. The software product of claim 22, wherein said first and second address each comprise a ten bit address field.

25. The software product of claim 23, wherein said exponent-field comprises a data field having between two and five bits inclusive and wherein said mantissa field comprises a data field having between twenty-six to twenty-nine bits inclusive.