Adaptive time-compression stabilizer

• US 6,531,979 B1
• Filed: 02/10/1970
• Issued: 03/11/2003
• Est. Priority Date: 02/10/1970
• Status: Expired due to Term

• Current Assignee: the united states of america as represented by the secretary of the navy
• Original Assignee: the united states of america as represented by the secretary of the navy
• Inventors: Hynes, Robert
• Primary Examiner(s): Sotomayor, John B.
• Application Number:
  US05/014,828
• Time in Patent Office: 12,082 Days
• Field of Search: 343/5.DP, 343/5.SA, 343/17.2 PC, 307/221, 307/271, 307/295, 328/134, 342/90, 342/192, 342/193, 342/194, 342/195, 342/196, 342/45
• US Class Current: 342/90
• CPC Class Codes: G01S 13/524 based upon the phase or frequency shift resulting from movement of objects, with reference to the transmitted signals, e.g. coherent MTi
• CPC Class Codes: G01S 7/021 Auxiliary means for detecting or identifying radar signals or the like, e.g. radar jamming signals
• CPC Class Codes: G01S 7/352 Receivers

Abstract

Circuit for stabilizing the spectral extent of a varying signal containing harmonically related frequency components and having particular utility in the spectral analysis of radar return for the purpose of target identification. The variable signal is written into a storage device at a fixed rate and read out with a variable time compression which is controlled by a discriminator circuit that is connected through a filter to receive one of the harmonic frequency components of the storage device output signal. Also included is signal conversion for digital storage with analog input and output signals.

Claims

1. Circuit for stabilizing the spectral extent of a varying signal containing harmonically related frequency components comprising:

storage means connected to receive said varying signal and functioning to store said varying signal at a fixed rate;

variable rate readout means connected to said storage means and functioning to produce a time compressed signal that has a variable time compression relationship to said varying signal;

filtering means connected to receive said time compressed signal and functioning to pass only a selected frequency component of said time compressed signal and

control means connected to receive said selected frequency component and producing an error signal that is connected to control said variable rate readout means and which is related to the deviation of said selected frequency component from a reference frequency,

whereby the spectrum extent of said time compressed signal is stabilized.

2. The circuit of claim 1 wherein said storage means includes an analog-to-digital converter controlled by a fixed frequency clock and said variable rate readout means includes a digital-to-analog converter controlled by a variable frequency clock which is connected to receive said error signal.

3. The circuit of claim 2 wherein said storage means further includes precession means which function to replace older stored varying signals with newer varying signals.

4. The circuit of claim 1 wherein said control means includes:

a reference oscillator;

a frequency discriminator connected to receive said selected frequency component;

frequency comparison means connected to said reference oscillator and to receive said selected frequency component and functioning to incapacitate said frequency discriminator when the frequency of said reference oscillatoris the same as said selected frequency component and

phase comparison means connected to said reference oscillator and to receive said selected frequency component and functioning to produce an error signal related to the phase difference between the signal produced by said reference oscillator and the selected frequency component.

5. The circuit of claim 4 wherein said storage means includes an analog-to-digital converter controlled by a fixed frequency clock and said variable rate readout means includes a digital-to-analog converter controlled by a variable frequency clock which is connected to receive said error signal.

6. The circuit of claim 5 wherein said storage means further includes precession means which function to replace older stored varying signals with newer varying signals.

7. In a radar system, a circuit which improves the frequency spectrum display of a signal derived from the radar return and which is particularly useful derived from the radar return identification by spectrum analysis, said circuit comprising:

storage means connected to receive said derived signal and functioning to store said derived signal at a fixed rate;

variable rate readout means connected to said storage means and functioning to produce a time compressed signal that has a variable time compression relationship to said derived signal;

a spectrum display device connected to receive said time compressed signal;

filtering means connected to receive said time compressed signal and functioning to pass only a selected frequency component of said time compressed signal and

control means connected to receive said selected frequency component and producing an error signal that is connected to control said viaiable rate readout means and which is related to the deviation of said selected frequency component from a reference frequency.

8. The circuit of claim 7 wherein said storage means includes an analog-to-digital converter controlled by a fixed frequency clock and said variable rate readout means includes a digital-to-analog converter controlled by a variable frequency clock which is connected to receive said error signal.

9. The circuit of claim 8 wherein said storage means further includes precession means which function to replace older stored derived signals with newer derived signals.

10. The circuit of claim 7 wherein said control means includes:

a reference oscillator;

a frequency discriminator connected to receive said selected freqluency component;

frequency comparison means connected to said reference oscillator and to receive said selected frequency component and functioning to incapacitate said frequency discriminator when the frequency of said reference oscillator is the same as said selected frequency component and

phase comparison means connected to said reference oscillator and to receive said selected frequency component and functioning to produce an error signal related to the phase difference between the signal produced by said reference oscillator and the selected frequency component.

11. The circuit of claim 10 wherein said storage means includes an analog-to-digital converter controlled by a fixed frequency clock and said variable rated readout means includes a digital-to-analog converter controlled by a variable frequmency clock which is connected to receive said error signal.

12. The circuit of claim 11 wherein said storage means further includes precession means which function to replace older stored derived signals with newer derived signals.

13. Apparatus for locking a variable input signal with a reference signal comprising:

frequency discriminator means connected to receive said variable input signal and functioning to produce a frequency error signal related to the frequency difference between said variable input signal and said reference signal;

frequency comparison means connected to receive said variable input signal and said reference signal and functioning,to incapacitate said frequency discriminator means when the frequency of said variable input signal is the same as the frequency of said reference signals;

phase comparison means connected to receive said variable input signal and said reference signal and functioning to produce a phase error signal related to the phase difference between said variable input signal and said reference signal and

control means connected to receive said frequency error signal and said phase error signal and functioning to vary the frequency of said variable input signal in a manner which causes said frequency and phase error signals to become zero.

14. Variable time compression signal storage apparatus comprising:

fixed rate conversion means connected to receive an input signal and functioning to convert said input signal at a fixed rate into digital signals in the form of a plurality of x-bit parallel input signals;

storage means having x parallel channels connected to receive said x-bit parallel input signals and to produce at a variable rate x-bit digital parallel output signals;

variable frequency control means connected to said storage means and functioning to control the variable rate of production of said x-bit digital parallel output signals and

digital-to-analog conversion means connected to receive said x-bit digital parallel output signal sand functioning to produce an analog output signal having a variable time compression relationship with said input signal.

15. Variable time compression signal storage apparatus as set forth in claim 14 wherein each of said x parallel channels includes;

a m-bit recirculating shift register;

a N-bit recirculating shift register connected to be driven at said variable frequency and

switching means controlled by said variable frequency control means to be alternately in a first position for N−

m+1+n cycles of said variable frequency and to be subsequentially in a second position for m cycles of said variable frequency and to repetitively alternate between said first and second positions, and functioning when in said first position to connect said m-bit register to be driven and loaded with input signals at a fixed rate and when in said second position to connect said m-bit register to said N-bit register and to be driven at said variable frequency, where n is the number of x-bit digital signals converted while said switching means is in said first position.