Low-noise active-pixel sensor for imaging arrays with high speed row reset
First Claim
Patent Images
1. An active pixel circuit having a photodetector, a source follower driver transistor, a row select transistor, a reset transistor, and a fourth transistor, the circuit comprising:
- a first capacitance connected between a node formed by the fourth transistor and the reset transistor and a circuit ground; and
a second capacitance connected between the reset transistor and the fourth transistor.
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Abstract
An imager pixel including a photodetector, a first MOS transistor functioning as the driver of a source follower amplifier during signal readout, a second MOS transistor serving as a pixel readout transistor, a third MOS transistor serving as a photodetector reset transistor, and a reset noise cancellation circuit including a fourth MOS transistor, first and second capacitances, and an amplifier having a gain which is the inverse of the ratio of the first to the second capacitance.
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Citations
34 Claims
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1. An active pixel circuit having a photodetector, a source follower driver transistor, a row select transistor, a reset transistor, and a fourth transistor, the circuit comprising:
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a first capacitance connected between a node formed by the fourth transistor and the reset transistor and a circuit ground; and
a second capacitance connected between the reset transistor and the fourth transistor. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. An active pixel sensor circuit comprising:
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(a) a photodetector element having a node;
(b) a first transistor having a control leg connected to the node and second and third legs, the third leg being connected to a power supply voltage;
(c) a second transistor having a control leg and fourth and fifth legs, the fourth leg connected to the second leg of the first transistor;
(d) a third transistor having a control leg and sixth and seventh legs, the seventh leg being connected to a reset voltage source;
(e) a fourth transistor having a control leg and eighth and ninth legs;
(f) a first capacitance formed between the eighth leg and ground; and
(g) a second capacitance formed between the eighth leg and the sixth leg. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. In an active pixel circuit including a photodetector, a source follower driver MOS transistor, a row select MOS transistor, a reset MOS transistor, a fourth MOS transistor, a method for reducing reset noise, the method comprising:
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arranging a first and second capacitances to apply a ratio of the values thereof to a voltage on one of them;
reading out the voltage on the photodetector;
resetting the photodetector; and
canceling reset noise created by resetting the photodetector by applying a gain which is the inverse of the ratio to generate a noise cancellation signal for supply to the fourth transistor. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29)
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30. In an imager pixel including a photodetector having a node and further having first, second, third and fourth transistors, a method of improving performance comprising:
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creating a first and second capacitances in the pixel adjacent to the node, the first and second capacitances having a ratio; and
employing an amplifier having a gain which is the inverse of the ratio to cancel reset noise resulting from resetting the photodetector. - View Dependent Claims (31)
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32. An imager pixel comprising:
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a photodetector;
first and second capacitances adjacent the photodetector and connected so as to supply a voltage on the first capacitance to the photodetector while multiplying that voltage by the ratio of the second capacitance to the first capacitance;
a first transistor means for functioning as the driver of a source follower amplifier during signal readout;
second transistor means for controlling signal readout;
third transistor means for serving as a reset switch; and
a fourth transistor means for transferring a voltage to the first capacitance. - View Dependent Claims (33, 34)
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Specification