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Control circuit for synchronous rectifiers in DC/DC converters to reduce body diode conduction losses

  • US 6,535,400 B2
  • Filed: 12/19/2001
  • Issued: 03/18/2003
  • Est. Priority Date: 03/30/2001
  • Status: Active Grant
First Claim
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1. A control system for a switched mode power supply including first and second synchronous rectifiers, each synchronous rectifier including a parasitic body diode, and having a first terminal, a second terminal, and a control terminal, the switched mode power supply further including a pulse width modulator (PWM) providing a plurality of PWM signal pulses, each PWM signal pulse corresponding to a switching cycle, the control system comprising:

  • a first control module providing a first control signal having a turn-on portion and a turn-off portion to the control terminal of the first synchronous rectifier, the first control module receiving as input signals a first measurement signal indicative of the magnitude of the voltage between the first and second terminals of the first synchronous rectifier, a second measurement signal indicative of the magnitude of the first control signal, and a PWM signal pulse corresponding to the current switching cycle, the first control module configured and arranged to predict the optimal turn-on time of the first synchronous rectifier as a function of the first and second measurement signals of the previous switching cycle, and the pulse signal of the current switching cycle and to configure the first control signal to provide the turn-on portion of the first control signal to the control terminal of the first synchronous rectifier accordingly, the first control module further configured and arranged to predict the optimal turn-off time for the first synchronous rectifier as a function of the first measurement signal of the previous switching cycle, and the PWM pulse signal of the current switching cycle and to configure the first control signal to provide the turn-off portion of the first control signal to the control terminal of the first synchronous rectifier wherein the conduction of the parasitic body diode of the first synchronous rectifier is substantially minimized.

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