Thermal management in a system

• US 6,535,798 B1
• Filed: 12/03/1998
• Issued: 03/18/2003
• Est. Priority Date: 12/03/1998
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Bhatia, Rakesh, Reinhardt, Dennis, Cooper, Barnes
• Primary Examiner(s): PATEL, RAMESH B
• Application Number:
  US09/204,530
• Time in Patent Office: 1,566 Days
• Field of Search: 700/299, 700/12, 700/13, 700/14, 700/16, 700/21, 700/22, 700/79, 700/80, 700/81, 700/82, 700/291-298, 327/113, 327/513, 327/512, 327/538, 327/544, 327/530, 713/132, 713/322-324, 713/340, 713/400, 713/500, 713/600-601
• US Class Current: 700/293
• CPC Class Codes: G05D 23/1917 using digital means
• CPC Class Codes: G06F 1/206 comprising thermal management
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system including a component (e.g., a processor) with a clock and a thermal management controller that monitors a temperature in the system. The thermal management controller varies the component between different performance states (e.g., cycles the processor between a high and a low performance state) when an over-temperature condition is detected. The thermal management controller further throttles the clock of the component while in the low performance state until the over-temperature condition is removed.

Claims

1. A system comprising:

a component having a clock; and

a thermal management controller adapted to monitor a first condition in the system and to vary the component between different performance states including a lower performance state in response to the controller detecting the first condition,

the thermal management controller adapted to throttle the clock of the component while the component is in the lower performance state in response to the first condition persisting.

2. The system of claim 1, wherein the different performance states include a second performance state, wherein less power consumption occurs in the lower performance state than in the second performance state.

3. The system of claim 2, wherein a supply voltage of the component is set at a first level in the lower performance state and at a second, higher level in the second performance state.

4. The system of claim 1, wherein the thermal management controller includes an interrupt handler.

5. The system of claim 1, wherein the first condition includes an over-temperature condition.

6. The system of claim 1, further comprising a temperature sensor that causes generation of a notification, wherein the thermal management controller is invoked in response to the notification.

7. The system of claim 6, wherein the notification includes an event defined by an Advanced Configuration and Power Interface Specification.

8. The system of claim 7, wherein the component includes a processor, and the control logic places the processor in a stop grant state to stop the clock of the processor.

9. The system of claim 1, wherein the thermal management controller includes control logic to control activation and deactivation of the clock to perform throttling.

10. The system of claim 1, wherein the thermal management controller is adapted to vary the component between different performance states while the component is set in a low activity state without performing a reset of the component.

11. The system of claim 1, wherein the thermal management controller is adapted to throttle the clock by stopping the clock a percentage of time during a predefined time period.

12. The system of claim 11, wherein the thermal management controller is adapted to throttle the clock by setting a duty cycle to determine the percentage time the clock is stopped.

13. The system of claim 12, wherein the thermal management controller is adapted to vary the duty cycle incrementally.

14. An apparatus to perform thermal management in a system that includes a processor, comprising:

a sensor to detect a first condition in the system; and

a controller to vary the system between performance modes including a lower performance mode in response to the first condition detected by the sensor, the controller further to throttle a clock of the processor while the system is in the lower performance mode to reduce system temperature.

15. The apparatus of claim 14, further comprising a higher performance mode, wherein the processor has an internal clock set at a first frequency in the lower performance mode and at a second, higher frequency in the higher performance mode.

16. The apparatus of claim 14, further comprising a higher performance mode, wherein the processor has a supply voltage set at a first level in the lower performance mode and at a second, higher level in the higher performance mode.

17. The apparatus of claim 14, comprising a first performance mode, a second performance mode, and at least one higher performance mode.

18. The apparatus of claim 17, wherein the lower performance mode includes one of the first and second performance modes.

19. The apparatus of claim 14, wherein the first condition includes an over-temperature condition.

20. The apparatus of claim 14, the controller to throttle the clock by stopping the clock a percentage of time in a predefined time period.

21. The apparatus of claim 20, the controller to set a duty cycle to determine the percentage time the clock is stopped.

22. The apparatus of claim 21, the controller to vary the duty cycle incrementally.

23. A thermal management method for a system including a component having a clock, comprising:

monitoring a temperature in the system;

transmitting an indication if the temperature exceeds a threshold temperature;

varying the system between power consumption levels including a lower power consumption level in response to the indication; and

throttling the clock from the lower power consumption level to reduce the temperature of the system by stopping the clock a percentage of time in a predefined time period.

24. The method of claim 23, wherein varying the system between power consumption levels includes cycling the system between the low power level and a high power level.

25. The method of claim 23, wherein transmitting the indication includes transmitting an interrupt.

26. The method of claim 25, wherein transmitting the interrupt includes generating a system management interrupt.

27. The method of claim 25, wherein transmitting the interrupt includes generating a system controller interrupt.

28. The method of claim 23, further comprising invoking a thermal management routine to perform the varying and throttling.

29. The method of claim 28, wherein the varying and throttling is performed by the thermal management routine under an Advanced Configuration and Power Interface Specification.

30. The method of claim 23, further comprising:

detecting if the system is at a higher power consumption level in response to the indication; and

transitioning the system to the lower power consumption level in response to the indication.

31. The method of claim 30, wherein throttling the clock of the component is performed if the system is detected to be at the lower power consumption level.

32. The method of claim 23, further comprising:

transmitting a second indication if the temperature is below the threshold temperature; and

disengaging throttling of the clock of the component in response to the second indication.

33. The method of claim 32, further comprising transitioning the system from the lower power consumption level in response to the second indication.

34. The method of claim 23, comprising monitoring the temperature in one of a plurality of zones in the system.

36. The article of claim 25, wherein the storage medium contains instructions for causing the system to further cycle the system between the first performance state and the second, higher performance state.

37. The article of claim 25, wherein the storage medium contains instructions for causing the system to further detect if the system is in a second performance state in response to the over-temperature condition and to transition the system to the first performance state in response.

38. The article of claim 37, wherein the storage medium contains instructions for causing the system to further detect if the system is in the first performance state in response to the over-temperature condition and to throttle the component'"'"'s clock in response.

35. An article including a machine-readable storage medium containing instructions for performing thermal management, the instructions when executed causing a system to:

transition the system between performance states including a first performance state and a second, higher performance state in response to an over-temperature condition; and

throttle a clock of a component in the system while it is in the first performance state to reduce temperature in the system.

39. The article of claim 35, wherein the storage medium contains instructions to cause the system to further detect if the temperature is below a threshold level and to disengage throttling the component'"'"'s clock in response.

40. The article of claim 35, wherein the instructions when executed cause the system to throttle the clock by stopping the clock a percentage of time during a predefined time period.

41. A computer data signal embodied in a carrier wave comprising:

one or more code segments containing instructions that when executed causes a system to

transition the system between performance states including a first performance state and a second, higher performance state in response to an over-temperature condition; and

throttle a clock of a component in the system while it is in the first performance state to reduce temperature in the system, wherein throttling the clock is performed by stopping the clock a percentage of time in a predefined time period.