Video and graphics system with a data transport processor

• US 6,538,656 B1
• Filed: 08/18/2000
• Issued: 03/25/2003
• Est. Priority Date: 11/09/1999
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Cheung, Francis, Grover, Glen A., Giese, Ben S., Walker, Carolyn B.
• Primary Examiner(s): Bella, Matthew C.
• Assistant Examiner(s): Sajous, Wesner
• Application Number:
  US09/640,869
• Time in Patent Office: 949 Days
• Field of Search: 345/700, 345/704, 345/716-719, 345/501, 345/503, 345/505-506, 345/519-522, 345/530, 345/555, 345/556, 345/574, 348/14.04, 348/14.13, 348/460, 348/461, 348/474, 348/552, 348/571, 348/630, 348/719-721, 348/723, 348/725, 348/901, 386/27, 386/33, 386/35, 386/37, 386/40, 386/66, 386/67, 386/68, 386/46, 386/101, 386/109, 386/123-128, 386/84-92, 725/63-72, 725/88-90, 725/105, 725/114, 725/131, 725/148, 725/151
• US Class Current: 345/519
• CPC Class Codes: G06T 9/007 Transform coding, e.g. discrete cosine transform
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2320/0247 Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
• CPC Class Codes: G09G 2340/02 Handling of images in compressed format, e.g. JPEG, MPEG
• CPC Class Codes: G09G 2340/0407 Resolution change, inclusive of the use of different resolutions for different screen areas
• CPC Class Codes: G09G 2340/10 Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 2360/121 using a cache memory
• CPC Class Codes: G09G 2360/125 using unified memory architecture [UMA]
• CPC Class Codes: G09G 2360/128 Frame memory using a Synchronous Dynamic RAM [SDRAM]
• CPC Class Codes: G09G 5/001 Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
• CPC Class Codes: G09G 5/02 characterised by the way in which colour is displayed details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607
• CPC Class Codes: G09G 5/024 using colour registers, e.g. to control background, foreground, surface filling G09G5/06 takes precedence
• CPC Class Codes: G09G 5/026 Control of mixing and/or overlay of colours in general G09G5/022 and G09G5/024 take precedence
• CPC Class Codes: G09G 5/06 using colour palettes, e.g. look-up tables
• CPC Class Codes: G09G 5/12 Synchronisation between the display unit and other units, e.g. other display units, video-disc players
• CPC Class Codes: G09G 5/14 Display of multiple viewports
• CPC Class Codes: G09G 5/28 for enhancement of character form, e.g. smoothing
• CPC Class Codes: G09G 5/346 for systems having a bit-mapped display memory
• CPC Class Codes: G09G 5/36 : characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
• CPC Class Codes: H04N 11/143 : Encoding means therefor H04N11/16 takes precedence
• CPC Class Codes: H04N 11/20 : Conversion of the manner in which the individual colour picture signal components are combined, e.g. conversion of colour television standards
• CPC Class Codes: H04N 19/42 : characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation H04N19/635 takes precedence
• CPC Class Codes: H04N 19/423 : characterised by memory arrangements H04N19/433 takes precedence
• CPC Class Codes: H04N 19/436 : using parallelised computational arrangements
• CPC Class Codes: H04N 19/44 : Decoders specially adapted therefor, e.g. video decoders which are asymmetric with respect to the encoder
• CPC Class Codes: H04N 19/61 : in combination with predictive coding
• CPC Class Codes: H04N 21/42204 : User interfaces specially adapted for controlling a client device through a remote control device; Remote control devices therefor constructive details of casings for the remote control device H01H9/0235; user interfaces for controlling a tuning device of a television receiver through a remote control H03J9/00; remote control of peripheral devices connected to a television receiver through the remote control device of the television receiver H04B1/205
• CPC Class Codes: H04N 21/426 : Internal components of the client ; Characteristics thereof H04N5/44 takes precedence
• CPC Class Codes: H04N 21/42653 : for processing graphics
• CPC Class Codes: H04N 21/4305 : Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083
• CPC Class Codes: H04N 21/4316 : for displaying supplemental content in a region of the screen, e.g. an advertisement in a separate window
• CPC Class Codes: H04N 21/434 : Disassembling of a multiplex stream, e.g. demultiplexing audio and video streams, extraction of additional data from a video stream; Remultiplexing of multiplex streams; Extraction or processing of SI; Disassembling of packetised elementary stream demultiplexing of data packets for data networks, e.g. RTP/UDP H04L65/00
• CPC Class Codes: H04N 21/4438 : Window management, e.g. event handling following interaction with the user interface
• CPC Class Codes: H04N 21/47 : End-user applications
• CPC Class Codes: H04N 5/126 : whereby the synchronisation signal indirectly commands a frequency generator
• CPC Class Codes: H04N 5/14 : Picture signal circuitry for video frequency region cameras or camera modules comprising electronic image sensors, or control thereof H04N23/00
• CPC Class Codes: H04N 5/44504 : Circuit details of the additional information generator, e.g. details of the character or graphics signal generator, overlay mixing circuits
• CPC Class Codes: H04N 5/45 : Picture in picture , e.g. displaying simultaneously another television channel in a region of the screen
• CPC Class Codes: H04N 5/46 : for receiving on more than one standard at will deflecting circuits of multi-standard receivers H04N3/27
• CPC Class Codes: H04N 7/0135 : involving interpolation processes interpolation-based image scaling G06T3/4007; interpolation for video coding H04N19/587, H04N19/59
• CPC Class Codes: H04N 9/45 : Generation or recovery of colour sub-carriers
• CPC Class Codes: H04N 9/641 : Multi-purpose receivers, e.g. for auxiliary information H04N9/642 takes precedence
• CPC Class Codes: H04N 9/642 : Multi-standard receivers

Abstract

A video and graphics system uses multiple transport processors to receive compressed data streams to perform PID and section filtering as well as DVB and DES decryption and to demultiplex them. The compressed data streams may include in-band and out-of-band MPEG Transport streams. The video and graphics system processes the PES into digital audio, MPEG video and message data. A core transport processor includes a PCR recovery module for extracting PCRs contained in the compressed data streams and for providing the extracted PCRs to a video transport processor and an audio decode processor. The PCR recovery module has a direct load capability for receiving user defined PCRs and outputting them instead of outputting the extracted PCRs. The PCR recovery module extracts PCRs from both MPEG Transport streams and DIRECTV transport streams. The core transport processor may also include a transport recorder for storing portions of compressed data streams and a playback circuit for reading the stored portions of the compressed data streams. The playback circuit includes a throttling mechanism and a hold mechanism to prevent buffer overflow.

Claims

1. A transport processor for receiving and processing a plurality of compressed data streams, the transport processor comprising:

a descrambler for decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

a PCR (program clock reference) recovery module for extracting PCRs contained in the compressed data streams and for providing the extracted PCRs as an output; and

wherein the PCR recovery module has a direct load capability for receiving user defined PCRs and outputting them instead of outputting the extracted PCRs,

wherein the extracted PCRs are provided to downstream devices including at least one of a first satellite transport processor and a second satellite transport processor.

2. A transport processor for receiving and processing a plurality of compressed data streams, the transport processor comprising:

a descrambler for decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

a PCR recovery module for extracting PCRs contained in the compressed data streams and for providing the extracted PCRs as an output; and

a transport recorder for storing at least a portion of the compressed data streams in a memory, and a playback circuit for reading the stored portion of the compressed data streams from the memory,

wherein the PCR recovery module has a direct load capability for receiving user defined PCRs and outputting them instead of outputting the extracted PCRs,

wherein the PCR recovery module includes a PCR circuitry for constructing the user defined PCRs from PTS in the compressed data streams, and wherein the user defined PCRs provide clock reference to the stored portion of the compressed data streams.

3. A transport processor for receiving and processing a plurality of compressed data streams, the transport processor comprising:

a descrambler for decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

a PCR recovery module for extracting PCRs contained in the compressed data streams and for providing the extracted PCRs as an output; and

a transport recorder for storing at least a portion of the compressed data streams in a memory, and a playback circuit for reading the stored portion of the compressed data streams from the memory,

wherein the PCR recovery module has a direct load capability for receiving user defined PCRs and outputting them instead of outputting the extracted PCRs,

wherein the playback circuit includes a throttling mechanism for limiting a maximum rate at which the stored portion of the compressed data streams is played back.

4. A transport processor for receiving and processing a plurality of compressed data streams, the transport processor comprising:

a descrambler for decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

a PCR recovery module for extracting PCRs contained in the compressed data streams and for providing the extracted PCRs as an output; and

a transport recorder for storing at least a portion of the compressed data streams in a memory, and a playback circuit for reading the stored portion of the compressed data streams from the memory,

wherein the PCR recovery module has a direct load capability for receiving user defined PCRs and outputting them instead of outputting the extracted PCRs,

wherein the playback circuit includes a hold mechanism for halting the stored portion of the compressed data streams from being played back.

5. The transport processor of claim 4 wherein the playback circuit is capable of receiving at least one video pause signal and at least one audio pause signal, and the at least one video pause signal and the at least one audio pause signal are used to halt the stored portion of the compressed data streams from being played back.

6. A method of receiving and processing a plurality of compressed data streams using a transport processor, the method comprising the steps of:

decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

extracting PCRs contained in the compressed data streams; and

providing the extracted PCRs as an output,

wherein the transport processor has a capability of outputting user defined PCRs instead of the extracted PCRs,

wherein the step of providing the extracted PCRs as an output comprises the step of providing the extracted PCRs to downstream devices including at least one of a first satellite transport processor and a second satellite transport processor.

7. A method of receiving and processing a plurality of compressed data streams using a transport processor, the method comprising the steps of:

decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

extracting PCRs contained in the compressed data streams;

providing the extracted PCRs as an output;

storing at least a portion of the compressed data streams in a memory;

playing back the stored portion of the compressed data streams from the memory; and

constructing the user defined PCRs from PTS in the compressed data streams,

wherein the transport processor has a capability of outputting user defined PCRs instead of the extracted PCRs,

wherein the user defined PCRs provide clock reference to the stored portion of the compressed data streams.

8. A method of receiving and processing a plurality of compressed data streams using a transport processor, the method comprising the steps of:

decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

extracting PCRs contained in the compressed data streams;

providing the extracted PCRs as an output;

storing at least a portion of the compressed data streams in a memory;

playing back the stored portion of the compressed data streams from the memory; and

limiting a maximum rate at which the stored portion of the compressed data streams is played back,

wherein the transport processor has a capability of outputting user defined PCRs instead of the extracted PCRs.

9. A method of receiving and processing a plurality of compressed data streams using a transport processor, the method comprising the steps of:

decrypting one or more compressed data streams when the one or more compressed data streams have been encrypted;

extracting PCRs contained in the compressed data streams;

providing the extracted PCRs as an output;

storing at least a portion of the compressed data streams in a memory;

playing back the stored portion of the compressed data streams from the memory; and

halting the playback of the stored portion of the compressed data streams,

wherein the transport processor has a capability of outputting user defined PCRs instead of the extracted PCRs.

10. The method of claim 9 wherein the stop of halting the playback comprises the steps of receiving at least one video pause signal and at least one audio pause signal, and wherein the at least one video pause signal and the at least one audio pause signal are used to halt the playback of the stored portion of the compressed data streams.