Circuit breaker with a single test button mechanism

• US 6,538,862 B1
• Filed: 11/26/2001
• Issued: 03/25/2003
• Est. Priority Date: 11/26/2001
• Status: Active Grant

• Current Assignee: ABB Schweiz AG (ABB Limited)
• Original Assignee: General Electric Company
• Inventors: Williams, Craig B., Rivers, Cecil Jr., Mason, Henry Hall Jr.
• Primary Examiner(s): Sircus, Brian
• Assistant Examiner(s): KITOV, ZEEV V
• Application Number:
  US09/683,138
• Time in Patent Office: 484 Days
• Field of Search: 361/42, 361/44, 361/45, 361/47, 335/6, 335/8, 335/9, 335/10, 324/424
• US Class Current: 361/42
• CPC Class Codes: H01H 2083/201 the other abnormal electrical condition being an arc fault
• CPC Class Codes: H01H 23/145 the actuating surface having two slightly inclined areas extending from the middle outward
• CPC Class Codes: H01H 71/0271 Mounting several complete assembled circuit breakers together interconnected mechanisms H01H71/1009
• CPC Class Codes: H01H 71/082 Connections between juxtaposed circuit breakers
• CPC Class Codes: H01H 83/144 with differential transformer
• CPC Class Codes: H02H 1/0015 Using arc detectors
• CPC Class Codes: H02H 3/335 the main function being self testing of the device

Abstract

In an exemplary embodiment of the invention, a dual test mechanism is presented for use in a circuit breaker. More specifically, the dual test mechanism includes a dual test button which comprises a single switch for testing both the AFCI and GFCI circuits of the breaker. The test mechanism includes a circuit board, which forms a part of the circuit breaker, and a test button assembly which includes a test button and signaling components which are electrically connected to the circuit board.

Claims

1. A test mechanism for a circuit breaker comprising:

an arc fault detection circuit;

a ground fault detection circuit,

a test button assembly including a test button and signaling components in operable communication with said arc fault detection circuitry, said test button having a first position and a second position, wherein positioning said test button in said first position produces a first signal indicative of an arc fault in a first pole of the circuit breaker and positioning said test button in said second position produces a second signal indicative of an arc fault in a second pole of the circuit breaker; and

a trip mechanism including a pair of separable contacts, said trip mechanism in operable communication with said ground fault detection circuitry so that in response to receiving one of said first and second signals, said arc fault detection circuitry causes said ground fault detection circuitry to generate a trip signal causing said trip mechanism to separate said pair of separable contacts.

2. The test mechanism of claim 1 wherein said signaling components comprise first and second conductive flats and a pivotable conductor intermediate said first and second conductive flats, said first and second conductive flats and said pivotable conductor in operable communication with said arc fault detection circuitry.

3. The test mechanism of claim 2 wherein positioning said test button in said first position causes said pivotable conductor to contact said first conductive flat producing said first signal and positioning said test button in said second position causes said pivotable conductor to contact said second conductive flat producing said second signal.

4. The test mechanism of claim 1 wherein said arc fault detection circuitry includes an arc fault circuit interruption circuit (AFCI) for each pole and said ground fault detection circuitry includes a ground fault circuit interruption (GFCI) circuit.

5. The test mechanism of claim 4 wherein said first position comprises a test position for a first said AFCI circuit for said first pole and said second position comprises a test position for a second said AFCI circuit for said second pole.

6. The test mechanism of claim 5 wherein said first signal initiates a trip in said first AFCI circuit by turning on a first silicon controlled rectifier (SCR) in said first AFCI circuit providing a current in operable communication with said GFCI circuit and wherein said second signal initiates said trip in said second AFCI circuit by turning on a second silicon controlled rectifier (SCR) in said second AFCI circuit providing said current in operable communication with said GFCI circuit.

7. The test mechanism of claim 6 wherein said current in operable communication with said GFCI circuit is by means of a current sensing transformer disposed in the circuit breaker;

said current causes a current imbalance detected by said GFCI circuit resulting in generation of a second trip signal.

8. The test mechanism of claim 7 wherein said means includes passing current through said current sensing transformer and said GFCI circuit is in operable communication with said current transformer via a secondary winding.

9. The test mechanism of claim 7 wherein said first signal is provided to said first AFCI circuit when said pivotable conductor and said first conductive flat are in contact.

10. The test mechanism of claim 7 wherein said trip mechanism includes a pivotable handle.

11. The test mechanism of claim 10 wherein said trip mechanism includes a solenoid which is in operable communication with said GFCI circuit and actuation of said solenoid causes said handle to pivot and separate said contacts.

12. The test mechanism of claim 11 wherein said solenoid is actuated by receipt of said second trip signal from said GFCI circuit.

13. The test mechanism of claim 7 wherein said second signal is provided to said second AFCI circuit upon contact between said pivotable conductor and said second conductive flat.

14. The test mechanism of claim 2 wherein said pivotable conductor comprises a pivotable leaf spring.

15. The test mechanism of claim 1 wherein said trip mechanism is in operable communication with said ground fault circuitry so that in response to an arc fault in any of said first and second poles, said arc fault detection circuitry generates said trip signal to said ground fault detection circuitry causing said trip mechanism to separate said pair of separable contacts.

16. The test mechanism of claim 15 wherein said trip signal is received by said ground fault detection circuitry using a current sensing transformer.

17. The test mechanism of claim 1 wherein said test button assembly and said arc fault detection circuit are configured for use with a single pole, three pole or more circuit breaker.

18. A circuit breaker comprising:

a trip unit including circuitry;

a pair of separable contacts for interrupting a flow of current; and

an arc fault detection circuit;

a ground fault detection circuit,

a test button assembly including a test button and signaling components in operable communication with said arc fault detection circuitry, said test button having a first position and a second position, wherein positioning said test button in said first position produces a first signal indicative of an arc fault in a first pole of the circuit breaker and positioning said test button in said second position produces a second signal indicative of an arc fault in a second pole of the circuit breaker; and

a trip mechanism in operable communication with said ground fault detection circuitry so that in response to receiving one of said first and second signals, said arc fault detection circuitry causes said ground fault detection circuitry to generate a trip signal causing said trip mechanism to separate said pair of separable contacts.

19. The test mechanism of claim 18 wherein said signaling components comprise first and second conductive flats and a pivotable conductor intermediate said first and second conductive flats, said first and second conductive flats and said pivotable conductor in operable communication with said arc fault detection circuitry.

20. The test mechanism of claim 19 wherein positioning said test button in said first position causes said pivotable conductor to contact said first conductive flat producing said first signal and positioning said test button in said second position causes said pivotable conductor to contact said second conductive flat producing said second signal.

21. The test mechanism of claim 18 wherein said arc fault detection circuitry includes an arc fault circuit interruption circuit (AFCI) for each pole and said ground fault detection circuitry includes a ground fault circuit interruption (GFCI) circuit.

22. The test mechanism of claim 21 wherein said first position comprises a test position for a first said AFCI circuit for said first pole and said second position comprises a test position for a second said AFCI circuit for said second pole.

23. The test mechanism of claim 22 wherein said first signal initiates a trip in said first AFCI circuit by turning on a first silicon controlled rectifier (SCR) in said first AFCI circuit providing a current in operable communication with said GFCI circuit and wherein said second signal initiates said trip in said second AFCI circuit by turning on a second silicon controlled rectifier (SCR) in said second AFCI circuit providing said current in operable communication with said GFCI circuit.

24. The test mechanism of claim 23 wherein said current in operable communication with said GFCI circuit is by means of a current sensing transformer disposed in the circuit breaker;

said current causes a current imbalance detected by said GFCI circuit resulting in generation of a second trip signal.

25. The test mechanism of claim 24 wherein said means includes passing current through said current sensing transformer and said GFCI circuit is in operable communication with said current transformer via as secondary winding.

26. The test mechanism of claim 24 wherein said trip mechanism includes a pivotable handle.

27. The test mechanism of claim 26 wherein said trip mechanism includes a solenoid which is in operable communication with said GFCI circuit and actuation of said solenoid causes said handle to pivot and separate said contacts.

28. The test mechanism of claim 27 wherein said solenoid is actuated by receipt of said second trip signal from said GFCI circuit.

29. A method of testing arc fault and ground fault functionality in a circuit breaker using a single test button irrespective of the number of poles, the method comprising:

selecting a pole to simulate an arc fault using the single test button;

generating a signal to simulate an arc fault upon said selecting said pole;

receiving said signal indicative of an arc fault in respective said pole of the circuit breaker;

generating an arc fault trip signal in a current sensing transformer, said arc fault trip signal indicative of said arc fault;

receiving a current in a GFCI circuit in response to said arc fault, said current indicative of a ground fault; and

generating a trip signal causing a trip mechanism of the circuit breaker to separate a pair of contacts.

30. The method of claim 29 wherein said selecting said pole includes selecting between two poles of the circuit breaker.

31. A method of testing arc fault and ground fault functionality in a double pole circuit breaker using a single test button, the method comprising:

selecting between a first and second pole to simulate an arc fault using the single test button;

generating one of a first and second signals corresponding to selected first or second pole using the single test button;

receiving said one of said first and second signals indicative of an arc fault in a respective pole of the circuit breaker;

generating an arc fault trip signal in a current sensing transformer, said arc fault trip signal indicative of said arc fault;

receiving said current in a GFCI circuit in response to said arc fault, said current indicative of a ground fault; and

generating a trip signal causing a trip mechanism of the circuit breaker to separate a pair of contacts.

32. The method of claim 31 wherein each of said first and second signals tests arc fault functionality for a respective pole.

33. The method of claim 31 wherein each of said first and second signals is received in a respective AFCI circuit for each pole.

34. The method of claim 33 wherein each said respective AFCI circuit uses said GFCI circuit as a tripping mechanism.

35. The method of claim 33 wherein each said respective AFCI circuit uses said GFCI circuit as a tripping mechanism, while also testing for GFCI functionality.

36. The method of claim 31 wherein said receiving current in said GFCI circuit includes a secondary winding in operable communication with said GFCI circuit and said current sensing transformer.