Method and apparatus for tracing hardware states using dynamically reconfigurable test circuits
First Claim
1. A method for tracing hardware states within a functional logic within a field programmable logic circuit using dynamically reconfigurable test circuits, said method comprising the steps of:
- first selecting a test mode from a plurality of test modes for tracing the operation of said functional logic;
after said step of selecting a test mode, second selecting one of a plurality of configurations for said dynamically reconfigurable test circuits in conformity with said selected test mode;
configuring said field programmable logic circuit with said selected configuration to configure said dynamically configurable test circuits;
tracing execution of program code to create a software trace history by executing a test program;
periodically reading a set of registers within said dynamically reconfigurable test circuits to create a hardware trace log in response to the receipt of a hardware trace request during said tracing; and
recording contents of said set of registers in synchronization with said software trace history to produce a full trace history.
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Accused Products
Abstract
A method and apparatus for tracing hardware states using dynamically reconfigurable test circuits provides improved debug and troubleshooting capability for functional logic implemented within field programmable logic arrays (FPGAs). Special test logic configurations may be loaded to enhance the debugging of a system using FPGAs. Registers are used to capture snapshots of internal signals for access by a trace program and a test multiplexer is used to provide real-time output to test pins for use with external test equipment. By retrieving the hardware snapshot information with a trace program running on a system in which the FPGA is used, software and hardware debugging are coordinated, providing a sophisticated model of overall system behavior. Special test circuits are implemented within the test logic configurations to enable detection of various events and errors. Counters are used to capture count values when system processor execution reaches a hardware trace point or when events occur. Comparators are used to detect specific data or address values and event detectors are used to detect particular logic value combinations that occur within the functional logic.
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Citations
10 Claims
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1. A method for tracing hardware states within a functional logic within a field programmable logic circuit using dynamically reconfigurable test circuits, said method comprising the steps of:
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first selecting a test mode from a plurality of test modes for tracing the operation of said functional logic;
after said step of selecting a test mode, second selecting one of a plurality of configurations for said dynamically reconfigurable test circuits in conformity with said selected test mode;
configuring said field programmable logic circuit with said selected configuration to configure said dynamically configurable test circuits;
tracing execution of program code to create a software trace history by executing a test program;
periodically reading a set of registers within said dynamically reconfigurable test circuits to create a hardware trace log in response to the receipt of a hardware trace request during said tracing; and
recording contents of said set of registers in synchronization with said software trace history to produce a full trace history. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system for controlling an electronic device, said system comprising:
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a field programmable logic circuit in which functional logic and a plurality of dynamically reconfigurable test circuits are implemented, wherein said plurality of dynamically reconfigurable test circuits includes a register set;
a processor for executing program instructions to control said electronic device and for instantiating said plurality of dynamically reconfigurable test circuits by loading a selected of a plurality of configuration images into said field programmable logic circuit;
a storage for storing said plurality of configuration images for configuring said field programmable logic circuit and for storing a test program, said test program including;
instructions for tracing execution of program code to create a software trace history;
instructions for periodically reading a set of registers within said plurality of test circuits to create a hardware log in response to the receipt of a hardware trace request; and
instructions for recording the contents of said registers in synchronization with said software trace history to produce a full trace history;
an interconnect coupling said field programmable logic circuit, said processor, and said storage. - View Dependent Claims (10)
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Specification