Method of self-synchronization of configurable elements of a programmable module

• US 6,542,998 B1
• Filed: 08/06/1999
• Issued: 04/01/2003
• Est. Priority Date: 02/08/1997
• Status: Expired due to Term

• Current Assignee: Scientia Sol Mentis AG (PACT XPP Schweiz AG)
• Original Assignee: Pact GmbH
• Inventors: Vorbach, Martin, Münch, Robert
• Primary Examiner(s): Heckler, Thomas M.
• Application Number:
  US09/369,653
• Time in Patent Office: 1,334 Days
• Field of Search: 713/400, 713/401, 713/1
• US Class Current: 713/400
• CPC Class Codes: G06F 15/7867 with reconfigurable architecture

Abstract

A method which permits self-synchronization of elements to be synchronized. Synchronization is neither implemented nor managed by a central entity. By shifting synchronization into each element, more synchronization tasks can also be performed simultaneously, because independent elements no longer interfere with one another when accessing the central synchronization entity. In a module with a two- or multi-dimensionally arranged programmable cell structure, each configurable element can access the configuration and status register of other configurable elements over an interconnecting structure and thus can have an active influence on their function and operation. The configuration can thus be accomplished by a load logic from a processing array.

Claims

1. A method for synchronization of data processing sequence control in a system with a plurality of configurable elements arranged in a programmable cell structure, comprising:

generating a synchronization signal during processing by a first configurable processing element;

sending the synchronization signal to a second configurable processing element over a bus system; and

synchronizing data processing in the second configurable processing element using the synchronization signal.

2. The method of claim 1, wherein

the synchronization signal is generated as a result of a comparison of data made by the first processing element.

3. The method of claim 1, wherein

the synchronization signal is generated as a result of carry-over of an arithmetic operation performed by the first processing element.

4. The method according to claim 1, further comprising:

controlling the sequence of data processing in the second processing element as a function of a type of the synchronization signal which is received by the second configurable processing element.

5. The method according to claim 1, further comprising:

prompting the second configurable processing element to execute only a single operation.

6. The method according to claim 1, further comprising:

prompting the second configurable processing element to freely execute a plurality of operations.

7. The method according to claim 1, further comprising:

stopping the execution of the second configurable processing element upon receipt of the synchronization signal.

8. The method according to claim 1, further comprising:

upon receipt of the synchronization signal, placing the second configurable processing element in a state that allows reconfiguration of the second configurable processing element.

9. The method according to claim 1, further comprising:

indicating the status of the second configurable element in a status register.

10. The method according to claim 1, further comprising:

sending computation output data from the first processor to the second processor.

11. The method according to claim 1, further comprising:

sending computational output data from the first processor to a third processor that does not receive the synchronization signal.

12. The method according to claim 1, further comprising:

blocking the transfer of synchronization signals to the second configurable processing element.

13. The method according to claim 1, further comprising:

blocking the transfer of synchronization signals from the first configurable processing element.

14. The method according to claim 1, further comprising:

selecting a type for the synchronization signal from a plurality of signal types;

determining the effect of the synchronization signal on the second processor as a function of the type.

15. The method according to claim 1, further comprising:

broadcasting the synchronization signal to a plurality of configurable processing elements.

16. The method according to claim 1, further comprising:

acknowledging receipt of the synchronization signal.

17. The method according to claim 16, further comprising:

allocating an acknowledge line to the synchronization signal, and wherein

the acknowledging receipt of the synchronization signal includes transmitting a signal via the acknowledge line.

18. The method of claim 1, further comprising:

maintaining a counter with the first processing element, wherein the synchronization signal is generated when the counter satisfies a predetermined condition.

19. The method of claim 18, wherein

the predetermined condition is satisfied when the counter changes sign.

20. The method of claim 18, wherein

the predetermined condition is satisfied when the counter overflows.

21. The method according to claim 1, further comprising:

generating a synchronization vector comprising a plurality of synchronization signals;

transmitting the synchronization vector from the first configurable processing element to the second configurable processing element.

22. The method according to claim 21, further comprising:

selecting a configuration register for the second configurable processing element from a plurality of configuration registers, the selected configuration register being selected as a function of the synchronization vector.

23. The method according to claim 21, further comprising:

selecting a command register for the second configurable processing element from a plurality of command registers, the selected command register being selected as a function of the synchronization vector.

24. A method of synchronization for a data processing system having configurable elements in a programmable cell structure, comprising:

generating configuration words within a first configurable element;

transferring the configuration words and a register address to a second configurable element; and

writing the configuration words into a register indicated by the register address.

25. The method of claim 24, further comprising,

indicating the status of the second configurable element by writing information to a status register.

26. The method of claim 24, further comprising:

coding the register address as part of a command; and

transferring the command from the first configurable element to the second configurable element over a data bus.

27. A method for synchronization of data processing sequence control in a system with a plurality of configurable elements arranged in a programmable cell structure, comprising:

sending a synchronization signal from a first configurable processing element to a second configurable processing element;

selecting a configuration for the second configurable processing element from a plurality of configurations, the configuration being chosen as a function of the synchronization signal;

sending a second synchronization signal from the first configurable processing element to the second configurable processing element;

choosing a command from a plurality of possible command, the command being chosen as a function of the second synchronization signal;

executing the command with the second configurable processing element.

28. The method of claim 27, further comprising:

indicating the status of the second configurable processing element by storing a value in a status register.

29. The method of claim 27, further comprising:

sending processing data from the first configurable processing element to the second configurable processing element.

30. The method of claim 27, further comprising:

sending processing data from the second configurable processing element to the first configurable processing element.

31. The method of claim 27, further comprising:

blocking the sending of the synchronization signal to the second configurable processing element.

32. The method of claim 27, wherein

the synchronization signal is sent when an error condition occurs in the first configurable processing element.

33. The method of claim 27, wherein

the synchronization signal is sent when a comparison operation performed by the first configurable processing element yields a predetermined result.

34. The method of claim 27, wherein

the synchronization signal is multicast to a plurality of configurable processing elements.

35. The method of claim 27, further comprising:

allocating an acknowledge line to the synchronization signal.

36. The method of claim 27, further comprising:

sending processing data from the first configurable processing element to a third configurable processing element.

37. The method of claim 36, wherein

the processing data is sent from the first configurable processing element to the third configurable processing element at the same time that synchronization signal is sent from the first configurable processing element to the second configurable processing element.

38. The method of claim 27, wherein

the synchronization signal is part of a synchronization vector comprising a plurality of synchronization signals.

39. The method of claim 38, further comprising:

storing a value for the synchronization signal in a register allocated to an operation.