Hybrid frame with lead-lock tape
First Claim
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1. A lead frame for use with a semiconductor device, said lead frame comprising:
- a plurality of inwardly extending leads, each lead of said plurality of inwardly extending leads having an end, said plurality of inwardly extending leads surrounding a position for said semiconductor device;
at least one bussing lead substantially longitudinally extending between said ends of said plurality of inwardly extending leads and across at least a portion of said position for said semiconductor device, said at least one bussing lead having a first end and second end; and
at least one tape segment attached between a portion of said at least one bussing lead and a portion of said lead frame.
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Abstract
A hybrid lead frame having leads for conventional lead-to-I/O wire bonding, and leads for power and ground bussing that extend over a surface of the semiconductor die are provided where the leads for bussing are held in place by lead-lock tape to prevent bending and/or other movement of the bussing leads during manufacturing. More specifically, the lead-lock tape is transversely attached across a plurality of bussing leads proximate to and outside of the position where the die is to be attached.
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Citations
53 Claims
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1. A lead frame for use with a semiconductor device, said lead frame comprising:
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a plurality of inwardly extending leads, each lead of said plurality of inwardly extending leads having an end, said plurality of inwardly extending leads surrounding a position for said semiconductor device;
at least one bussing lead substantially longitudinally extending between said ends of said plurality of inwardly extending leads and across at least a portion of said position for said semiconductor device, said at least one bussing lead having a first end and second end; and
at least one tape segment attached between a portion of said at least one bussing lead and a portion of said lead frame. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A hybrid lead frame for use with a semiconductor device, said lead frame comprising:
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a first plurality of inwardly extending leads, each lead of said first plurality of inwardly extending leads having an upper surface and a first end, said first plurality of inwardly extending leads surrounding a position for said semiconductor device;
at least one bussing lead substantially longitudinally extending between said first ends of said first plurality of inwardly extending leads and across at least a portion of said position for said semiconductor device, said at least one bussing lead having a first end, a second end, and an upper surface; and
at least one tape segment attached between said at least one bussing lead and a portion of said hybrid lead frame. - View Dependent Claims (10, 11, 12, 13, 14, 15)
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16. A hybrid lead frame for use with a semiconductor device, said hybrid lead frame comprising:
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a first plurality of inwardly extending leads, each lead of said first plurality of inwardly extending leads having an upper surface and a first end, said plurality of inwardly extending leads forming a position for said semiconductor device;
at least two bussing leads substantially longitudinally extending between said first ends of said first plurality of inwardly extending leads and across at least a portion of said position for said semiconductor device, each bussing lead of said at least two bussing leads having a first end, a second end, and an upper surface;
at least one first tape segment transversely attached between said at least two bussing leads adjacent said second ends of said at least two bussing leads; and
at least one second tape segment attached between said at least two bussing leads adjacent said first ends of said at least two bussing leads. - View Dependent Claims (17, 18, 19, 20)
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21. A semiconductor memory device assembly, comprising:
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a lead frame having a plurality of lead fingers, each lead of said plurality of lead fingers having an end, said lead frame having at least one bussing lead, said at least one bussing lead longitudinally extending between an opening formed by said ends of said plurality of lead fingers;
a semiconductor device positioned within said opening formed by said ends of said plurality of lead fingers; and
at least one tape segment attached to said at least one bussing lead and a portion of said lead frame. - View Dependent Claims (22)
at least one second tape segment attached to said at least one bussing lead, said at least one second tape segment positioned between said semiconductor device and said at least one bussing lead.
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23. A semiconductor device assembly, comprising:
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a lead frame having a plurality of lead fingers, each lead finger of said plurality of lead fingers having an end, said lead frame having at least two bussing leads, each bussing lead of said at least two bussing leads longitudinally extending between an opening formed by said ends of said plurality of lead fingers;
a semiconductor device positioned within said opening formed by said ends of said plurality of lead fingers; and
at least one tape segment attached to a portion of each lead of said at least two bussing leads, said at least one tape segment positioned adjacent said opening formed by said ends of said plurality of lead fingers. - View Dependent Claims (24)
at least one second tape segment attached to a portion of said at least two bussing leads, said at least one second tape segment positioned between said semiconductor device and said at least two bussing leads.
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25. A computer assembly comprising:
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at least one semiconductor device assembly, said semiconductor device assembly comprising;
a lead frame having a plurality of lead fingers, each lead finger of said plurality of lead fingers having an end, said lead frame having at least one bussing lead, said at least one bussing lead longitudinally extending between a space formed by said ends of said plurality of lead fingers;
a semiconductor device positioned within said space formed by said ends of said plurality of lead fingers; and
at least one tape segment transversely attached to a portion of said at least one bussing lead and a portion of said lead frame.
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26. A lead frame for use with a semiconductor device, said lead frame comprising:
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a plurality of leads, each lead of said plurality of said leads having an upper surface, and an end, said upper surfaces of said plurality of leads forming a first plane and said ends of said plurality of leads defining a position for said semiconductor device;
a plurality of bussing leads extending between said ends of said plurality of leads and over at least a portion of said position for said semiconductor device, each bussing lead of said plurality of bussing leads having a first end, a second end, and an upper surface, at least a portion of said upper surfaces of said plurality of bussing leads forming a second plane; and
at least one tape segment attached to at least two of said plurality of bussing leads adjacent said second ends of said at least two of said plurality of bussing leads. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33)
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34. A hybrid lead frame for use with a semiconductor device, said hybrid lead frame comprising:
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a first plurality of leads, each lead of said first plurality of leads having an upper surface and an end, said upper surfaces of said first plurality of leads defining a first plane and said ends of said first plurality of leads defining a position for said semiconductor device;
a plurality of bussing leads extending between said ends of said first plurality of leads and over at least a portion of said position for said semiconductor device, each bussing lead of said plurality of bussing leads having a first end, a second end, and an upper surface, at least a portion of said upper surfaces of said plurality of bussing leads defining a second plane; and
at least one tape segment attaching at least two of said plurality of bussing leads proximate said second ends of said at least two of said plurality of bussing leads. - View Dependent Claims (35, 36, 37, 38, 39, 40, 41)
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42. A hybrid lead frame for use with a semiconductor device, said hybrid lead frame comprising:
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a plurality of leads, each lead of said plurality of leads having an upper surface and an end, said upper surfaces of said plurality of leads forming a first plane and said ends of said plurality of leads forming a position for said semiconductor device, a plurality of bussing leads substantially longitudinally extending between said ends of said plurality of leads and across at least a portion of said position for said semiconductor device, each bussing lead of said plurality of bussing leads having a first end, a second end, and an upper surface, at least a portion of said upper surfaces of said plurality of bussing leads forming a second plane;
a first tape segment attaching at least two of said plurality of bussing leads adjacent said second ends of said at least two of said plurality of bussing leads; and
a second tape segment attached between at least two of said plurality of bussing leads adjacent said first ends of said at least two of said plurality of bussing leads. - View Dependent Claims (43, 44, 45, 46, 47, 48)
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49. A semiconductor device, comprising:
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a lead frame having a plurality of lead fingers, each lead finger of said plurality of lead fingers having an end, and having a plurality of bussing leads, said plurality of bussing leads longitudinally extending between a space formed by said ends of said plurality of lead fingers;
a semiconductor device positioned within said space formed by said ends of said plurality of lead fingers; and
at least one tape segment attached to at least two of said plurality of bussing leads, said at least one tape segment positioned adjacent said space formed by said ends of said plurality of lead fingers. - View Dependent Claims (50, 51, 52)
said at least one second tape segment attached to said at least two of said plurality of bussing leads, said at least one second tape segment positioned between said semiconductor device and said plurality of bussing leads.
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51. The semiconductor device of claim 49, further comprising:
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said plurality of lead fingers being located in a first plane;
said semiconductor device having an active surface located in substantially said first plane of said plurality of lead fingers; and
said plurality of bussing leads being located in a second plane.
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52. The semiconductor device of claim 51, wherein said second plane is located above said active surface of said semiconductor device.
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53. A computer comprising:
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at least one semiconductor device, said at least one semiconductor device comprising;
a lead frame having a plurality of lead fingers, each lead finger of said plurality of lead fingers having an end and having a plurality of bussing leads, said plurality of bussing leads extending between a space formed by said ends of said plurality of lead fingers;
a semiconductor device positioned within said space formed by said ends of said plurality of lead fingers; and
at least one tape segment attached to at least two of said plurality of bussing leads, said at least one tape segment positioned adjacent said space formed by said ends of said plurality of lead fingers.
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Specification