Multimedia chip package

• US 6,548,911 B2
• Filed: 08/03/2001
• Issued: 04/15/2003
• Est. Priority Date: 12/06/2000
• Status: Expired due to Term

• Current Assignee: Siliconware Precision Industries Co., Ltd.
• Original Assignee: Siliconware Precision Industries Co., Ltd.
• Inventors: Yu, Kevin, Chang, Che-Jung, Huang, Chien-Ping
• Primary Examiner(s): Flynn, Nathan J.
• Assistant Examiner(s): GREENE, PERSHELLE L
• Application Number:
  US09/922,254
• Publication Number:
  US 20020066947A1
• Time in Patent Office: 620 Days
• Field of Search: 257/685, 257/686, 257/777, 257/786, 257/784, 257/787, 257/678
• US Class Current: 257/786
• CPC Class Codes: H01L 21/565 Moulds
• CPC Class Codes: H01L 2223/54473 for use after dicing
• CPC Class Codes: H01L 2223/54486 Located on package parts, e.g. encapsulation, leads, package substrate
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/544 Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps test patterns for characterising or monitoring manufacturing processes H01L22/00
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/1815 : Shape
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A substrate unit has a first surface and a corresponding second surface, and a plurality of nodes and at least a die pad are formed on the first surface of the substrate unit. A plurality of external nodes is formed on the second surface of the substrate unit, and the external nodes are electrically connected to the nodes. A multimedia chip has an active surface and a corresponding back surface, and a plurality of bonding pads are formed on the active surface of the multimedia chip. The back surface of the multimedia chip is adhered on the die pad of the substrate unit. A molding compound encapsulates the multimedia chip, the first surface of the substrate unit, and the conductive wires, and exposes the second surface of the substrate unit and the external nodes.

Claims

1. A multimedia chip package, comprising:

the substrate unit, and a plurality of external nodes is formed on the second surface of the substrate unit;

at least a multimedia chip having an active surface and a corresponding back surface, wherein a plurality of bonding pads is formed on the active surface of the multimedia chip, the back surface of the multimedia chip is adhered on the die pad of the substrate unit, and a plurality of conductive wires electrically connects the bonding pad to the nodes;

a molding compound encapsulating the multimedia chip, the first surface of the substrate unit and the conductive wires, and exposing the second surface of the substrate unit and the external nodes; and

a label is adhered on a surface of the molding compound.

2. The package of claim 1, wherein the external nodes are arranged in a peripheral region near the second surface of the substrate unit.

3. The package of claim 1, wherein the external nodes are square, rectangular or a combination thereof.

4. A multimedia chip package, comprising:

a substrate unit, having a first surface and a corresponding second surface, wherein at least a die pad, a plurality of first nodes and a plurality of external nodes are formed on the first surface of the substrate unit, and at least a second die pad and a plurality of second nodes are formed on the second surface of the substrate unit;

at least a first multimedia chip having a first active surface and a corresponding first back surface, wherein a plurality of first bonding pads is formed on the first active surface of the first multimedia chip, wherein the first back surface of the first multimedia chip is adhered on the first die pad of the substrate unit and a plurality of first conductive wires electrically connects the first bonding pads to the first nodes;

at least a second multimedia chip having a second active surface and a corresponding second back surface, wherein a plurality of second bonding pads is formed on the second active surface of the second multimedia chip, wherein the second back surface of the second multimedia chip is adhered on a second die pad of the substrate unit and a plurality of second conductive wires electrically connects the second bonding pads to the second nodes; and

a molding compound encapsulating the first multimedia chip, the second multimedia chip, the first conductive wires, the second conductive wires, and a portion of the first surface of the substrate unit, and exposing the external nodes.

5. The package of claim 4, wherein the molding compound encapsulates the second surface of the substrate unit.

6. The package of claim 4, wherein the molding compound encapsulates a portion of the second surface of the substrate unit.

7. The package of claim 4, wherein the substrate unit has side surfaces exposed by the molding compound.

8. The package of claim 4, wherein the molding compound encapsulates the side surfaces of the substrate unit.

9. The package of claim 4, wherein the external nodes are located near a peripheral region of the first surface of the substrate unit.

10. The package of claim 4, wherein the external nodes are rectangular, square or a combination thereof in shape.