D/A conversion circuit and liquid crystal display device

• US 6,549,196 B1
• Filed: 09/22/1999
• Issued: 04/15/2003
• Est. Priority Date: 11/24/1998
• Status: Expired due to Fees

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Itakura, Tetsuro, Shima, Takeshi, Taguchi, Takashi
• Primary Examiner(s): Saras, Steven
• Assistant Examiner(s): Anyaso, Uchendu O.
• Application Number:
  US09/401,847
• Time in Patent Office: 1,301 Days
• Field of Search: 345/98, 345/204, 345/211, 345/212, 345/210
• US Class Current: 345/210
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: H03M 1/0872 by disabling changes in the output during the transitions, e.g. by holding or latching
• CPC Class Codes: H03M 1/765 using a single level of switches which are controlled by unary decoded digital signals

Abstract

A D/A conversion circuit which can perform D/A conversion at high speed and with high precision is disclosed. The D/A conversion circuit comprises an analog reference power supply, an output buffer, a multiplexer, a pre-buffer, and a current changeover switch. The pre-buffer operates with a power supply voltage different from that of the analog reference power supply, and outputs a voltage substantially equal to an output voltage of the analog reference power supply. For a predetermined period after logic of digital data changes, the output voltage of the pre-buffer is supplied to the output buffer, and an input parasitic capacitor of the output buffer is charged/discharged. After the predetermined period elapses, the output voltage of the analog reference power supply is supplied to the output buffer. Therefore, a charging/discharging current of the input parasitic capacitor does not flow through the analog reference power supply, and fluctuation of the output voltage of the analog reference power supply can be suppressed.

Claims

1. A D/A conversion circuit provided with an analog reference power supply for using a first power supply voltage as a drive voltage and outputting a plurality of different voltages,

a voltage selecting circuit configured to select one of said plurality of different voltages based on a string of digital data, and

an output buffer configured to convert impedance of the voltage selected by said voltage selecting circuit, comprising:

a charging/discharging voltage generating circuit configured to use a second power supply voltage as the drive voltage and to output a second power supply voltage correlated with said one of said plurality of different voltages of said analog reference power supply; and

a current switchover circuit configured to switch a direction in which a current flows in such a manner that a charging/discharging current of an input parasitic capacitor of said output buffer passes through said charging/discharging voltage generating circuit for a predetermined period after said bit string of digital data changes, and in such a manner that said charging/discharging current passes through said analog reference power supply after said predetermined period elapses.

2. The D/A conversion circuit according to claim 1, wherein said charging/discharging voltage generating circuit uses said second power supply voltage as the drive voltage, and outputs a voltage correlated with the voltage selected by said voltage selecting circuit, and

said output buffer converts the impedance of the output voltage of said voltage selecting circuit or said charging/discharging voltage generating circuit in accordance with a direction in which said current switchover circuit switches the current.

3. The D/A conversion circuit according to claim 2, wherein said charging/discharging voltage generating circuit has a pre-buffer for performing feedback control in such a manner that the output voltage becomes substantially equal to an input voltage.

4. The D/A conversion circuit according to claim 2, wherein said charging/discharging voltage generating circuit has a plurality of resistances connected in series,

said analog reference power supply has a plurality of resistances connected in series, and

resistance values of the plurality of resistances in said charging/discharging voltage generating circuit are set to be smaller than resistance values of the plurality of resistances in said analog reference power supply.

5. The D/A conversion circuit according to claim 4, wherein a resistance ratio of the plurality of resistances in said charging/discharging voltage generating circuit is set to be substantially equal to a resistance ratio of the plurality of resistances in said analog reference power supply.

6. The D/A conversion circuit according to claim 1, wherein said charging/discharging voltage generating circuit uses said second power supply voltage as the drive voltage, and outputs a plurality of voltages correlated with the output voltages of said analog reference power supply,

said current switchover circuit is provided for each output voltage of said charging/discharging voltage generating circuit, outputs the corresponding output voltage of said charging/discharging voltage generating circuit for said predetermined period, and outputs the output voltage of said voltage selecting circuit after said predetermined period elapses, and

said output buffer converts the impedance of the output voltage of said current switchover circuit.

7. The D/A conversion circuit according to claim 6, wherein said charging/discharging voltage generating circuit has a pre-buffer for performing feedback control in such a manner that the output voltage becomes substantially equal to an input voltage.

8. The D/A conversion circuit according to claim 6, wherein said charging/discharging voltage generating circuit has a plurality of resistances connected in series,

said analog reference power supply has a plurality of resistances connected in series, and

resistance values of the plurality of resistances in said charging/discharging voltage generating circuit are set to be smaller than resistance values of the plurality of resistances in said analog reference power supply.

9. The D/A conversion circuit according to claim 8, wherein a resistance ratio of the plurality of resistances in said charging/discharging voltage generating circuit is set to be substantially equal to a resistance ratio of the plurality of resistances in said analog reference power supply.

10. The D/A conversion circuit according to claim 1, wherein said charging/discharging voltage generating circuit uses said second power supply voltage as the drive voltage, and outputs a plurality of voltages correlated with output voltages of said analog reference power supply,

said current switchover circuit is provided for each output voltage of said charging/discharging voltage generating circuit, outputs the corresponding output voltage of said charging/discharging voltage generating circuit for said predetermined period, and outputs the corresponding output voltage of said analog reference power supply after said predetermined period elapses,

said voltage selecting circuit selects the output voltage of said current switchover circuit in accordance with the bit string of said digital data, and

said output buffer converts the impedance of the output voltage of said voltage selecting circuit.

11. The D/A conversion circuit according to claim 10, wherein said charging/discharging voltage generating circuit has a pre-buffer for performing feedback control in such a manner that the output voltage becomes substantially equal to an input voltage.

12. The D/A conversion circuit according to claim 10, wherein said charging/discharging voltage generating circuit has a plurality of resistances connected in series,

said analog reference power supply has a plurality of resistances connected in series, and

resistance values of the plurality of resistances in said charging/discharging voltage generating circuit are set to be smaller than resistance values of the plurality of resistances in said analog reference power supply.

13. The D/A conversion circuit according to claim 12, wherein a resistance ratio of the plurality of resistances in said charging/discharging voltage generating circuit is set to be substantially equal to a resistance ratio of the plurality of resistances in said analog reference power supply.

14. The D/A conversion circuit according to claim 1, wherein said charging/discharging voltage generating circuit uses said second power supply voltage as the drive voltage, and outputs a plurality of voltages correlated with output voltages of said analog reference power supply,

said voltage selecting circuit has a plurality of switch means connected between output terminals of said analog reference power supply and an input terminal of said output buffer,

said charging/discharging voltage generating circuit has a plurality of buffers connected in parallel with said plurality of switch means, and

said current switchover circuit supplies said second power supply voltage to said charging/discharging voltage generating circuit only for said predetermined period.

15. The D/A conversion circuit according to claim 14, further comprising a power supply switch circuit for supplying said second power supply voltage to said plurality of buffers only for the predetermined period after the bit string of said digital data changes.

16. The D/A conversion circuit according to claim 1, comprising a capacity dividing circuit for dividing a capacity of a plurality of capacitors based on bits other than bits of said digital data, and outputting a voltage in accordance with an output voltage of said voltage selecting circuit,

said output buffer converting the impedance of the output voltage of said capacity dividing circuit.

17. The D/A conversion circuit according to claim 16, wherein said charging/discharging voltage generating circuit has a pre-buffer for performing feedback control in such a manner that the output voltage becomes substantially equal to an input voltage.

18. The D/A conversion circuit according to claim 16, wherein said charging/discharging voltage generating circuit has a plurality of resistances connected in series,

said analog reference power supply has a plurality of resistances connected in series, and

resistance values of the plurality of resistances in said charging/discharging voltage generating circuit are set to be smaller than resistance values of the plurality of resistances in said analog reference power supply.

19. The D/A conversion circuit according to claim 18, wherein a resistance ratio of the plurality of resistances in said charging/discharging voltage generating circuit is set to be substantially equal to a resistance ratio of the plurality of resistances in said analog reference power supply.

20. The D/A conversion circuit according to claim 1, wherein said predetermined period is a time correlated with a period in which an input parasitic capacitor of said output buffer is charged or discharged.

21. The D/A conversion circuit according to claim 1, comprising:

a first pattern for supplying said first power supply voltage to said analog reference power supply; and

a second pattern for supplying said second power supply voltage to said charging/discharging voltage generating circuit,

said first and second patterns being connected to a common pad,

said second pattern being formed to be thicker and shorter than said first pattern.

22. A liquid crystal display device, comprising:

a pixel array portion in which a signal line and a scanning line are arranged, and pixel electrodes are formed in the vicinity of an intersection of the signal lines and the scanning lines, respectively;

a signal line drive circuit provided with the D/A conversion circuit according to claim 1 for driving each signal line; and

a scanning line drive circuit for driving each scanning line,

said signal line drive circuit converting digital data constituted of pixel display information to an analog pixel voltage by said D/A conversion circuit and supplying the voltage to the corresponding signal line.