Pixel structure of active pixel sensor (APS) with electronic shutter function
First Claim
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1. A pixel structure with an electronic shutter function using an active pixel sensor (APS), comprising:
- a plurality of pixel sensors arrayed in rows and columns;
a row selection decoder for outputting a row selection signal to each pixel sensor;
a first line counter for counting a number of lines of the pixel sensors selected by the row selection decoder;
a line reset selection decoder for outputting a line reset signal to each pixel sensor;
a second line counter for counting a number of lines of the pixel sensors selected by the line reset selection decoder;
a column reset selection decoder for outputting a column reset signal to each pixel;
a first pixel counter for counting a number of the pixel sensors selected by the column reset selection decoder;
a pixel reading means for reading the pixel sensors in pixel units; and
a second pixel counter for counting a number of the pixel sensors which are read by the pixel reading means, wherein each pixel sensor comprises;
a first NMOS transistor with its gate and drain connected to each other and to receive a power supply voltage;
a second NMOS transistor with its gate connected to receive the line reset signal and its drain connected to a source of the first NMOS transistor;
a third NMOS transistor with its gate receiving the column reset signal, its drain connected to a source of the second NMOS transistor, and its source connected to receive a ground voltage;
a fourth NMOS transistor with its gate connected to the source of the first NMOS transistor and the drain of the second NMOS transistor, and with its drain connected to receive the power supply voltage;
a photo-diode with its anode connected to receive the ground voltage and its cathode connected to a source of the fourth NMOS transistor;
a fifth NMOS transistor with its gate connected to the source of the fourth NMOS transistor and the cathode of the photo-diode, and with its drain connected to receive the power supply voltage; and
a sixth NMOS transistor with its gate connected to receive the row selection signal, its drain connected to a source of the fifth NMOS transistor, and with its source connected to output an output signal of the pixel sensor.
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Abstract
A pixel structure with an electronic shutter function using an active pixel sensor (APS) capable of overcoming a disadvantage of conventional pixel structures using the active pixel sensor that reset the pixels not in pixel units but in line units, and thus an electronic shutter cannot be provided, includes a plurality of pixels arrayed in a lattice pattern, a row selection decoder outputting a row selection signal to each pixel, a first line counter counting a number of lines of the pixels selected by the row selection decoder, a line reset selection decoder outputting a line reset signal to each pixel, a second line counter counting a number of lines of the pixel selected by the line reset selection decoder, a column reset selection decoder outputting a column reset signal to each pixel, a first pixel counter counting a number of the pixels selected by the column reset selection decoder, a pixel reading unit reading the pixels in pixel units, and a second pixel counter counting a number of the pixels which are read by the pixel reading unit.
41 Citations
3 Claims
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1. A pixel structure with an electronic shutter function using an active pixel sensor (APS), comprising:
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a plurality of pixel sensors arrayed in rows and columns;
a row selection decoder for outputting a row selection signal to each pixel sensor;
a first line counter for counting a number of lines of the pixel sensors selected by the row selection decoder;
a line reset selection decoder for outputting a line reset signal to each pixel sensor;
a second line counter for counting a number of lines of the pixel sensors selected by the line reset selection decoder;
a column reset selection decoder for outputting a column reset signal to each pixel;
a first pixel counter for counting a number of the pixel sensors selected by the column reset selection decoder;
a pixel reading means for reading the pixel sensors in pixel units; and
a second pixel counter for counting a number of the pixel sensors which are read by the pixel reading means, wherein each pixel sensor comprises;
a first NMOS transistor with its gate and drain connected to each other and to receive a power supply voltage;
a second NMOS transistor with its gate connected to receive the line reset signal and its drain connected to a source of the first NMOS transistor;
a third NMOS transistor with its gate receiving the column reset signal, its drain connected to a source of the second NMOS transistor, and its source connected to receive a ground voltage;
a fourth NMOS transistor with its gate connected to the source of the first NMOS transistor and the drain of the second NMOS transistor, and with its drain connected to receive the power supply voltage;
a photo-diode with its anode connected to receive the ground voltage and its cathode connected to a source of the fourth NMOS transistor;
a fifth NMOS transistor with its gate connected to the source of the fourth NMOS transistor and the cathode of the photo-diode, and with its drain connected to receive the power supply voltage; and
a sixth NMOS transistor with its gate connected to receive the row selection signal, its drain connected to a source of the fifth NMOS transistor, and with its source connected to output an output signal of the pixel sensor. - View Dependent Claims (2, 3)
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Specification
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Current AssigneeHanger Solutions, LLC (IP Investments Group LLC)
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Original AssigneeHyundai Electronics Industries Co. Ltd. (SK Hynix Inc.)
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InventorsLee, Sung-Min
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Primary Examiner(s)Garber, Wendy R.
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Assistant Examiner(s)Ye, Lin
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Application NumberUS09/170,105Time in Patent Office1,645 DaysField of Search348/241, 348/308, 348/294, 348/302, 348/303, 348/296, 348/304, 348/297, 250/208.1US Class Current348/302CPC Class CodesH04N 25/531 by controlling rolling shut...H04N 25/77 Pixel circuitry, e.g. memor...
