Remote configuration access for integrated circuit devices

• US 6,553,439 B1
• Filed: 08/30/1999
• Issued: 04/22/2003
• Est. Priority Date: 08/30/1999
• Status: Expired due to Term

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sakuta, Toshiyuki, Greger, Michael J., Wehage, Eric R.
• Primary Examiner(s): Shin, Christopher B.
• Assistant Examiner(s): Perveen, Rehana
• Application Number:
  US09/385,390
• Time in Patent Office: 1,331 Days
• Field of Search: 710/8, 710/9, 710/11, 710/36, 710/39, 710/62, 710/64
• US Class Current: 710/62
• CPC Class Codes: G06F 13/4291 using a clocked protocol

Abstract

A local integrated circuit device provides remote configuration access to one or more remote integrated circuit devices. The local integrated circuit device receives configuration access requests through at least two interfaces. The local integrated circuit device accesses a configuration space of one or more remote integrated circuit devices in accordance with the received configuration access requests.

Claims

1. A method comprising:

receiving by a local integrated circuit device configuration access requests through one of at least two interfaces using a first communication protocol; and

accessing a configuration space of one or more remote integrated circuit devices in accordance with the received configuration access requests, but using a second communication protocol which is different than the first communication protocol.

2. The method of claim 1, wherein the receiving comprises receiving configuration access requests through the at least two interfaces using different communication protocols.

3. The method of claim 1, wherein the at least two interfaces for receiving configuration access requests comprise a joint test action group (JTAG) port, an inter-integrated circuit (I2C) port, a processor interface, and/or a peripheral component interface (PCI).

4. The method of claim 1, wherein one of the configuration access requests received through the at least two interfaces uses addressing information in a peripheral component interface (PCI) addressing format to identify a target memory location for the configuration access request.

5. The method of claim 1, wherein the accessing comprises accessing the configuration space of at least two remote integrated circuit devices using different communication protocols.

6. The method of claim 1, wherein the accessing comprises accessing a configuration register in the configuration space of one or more remote integrated circuit devices.

7. An integrated circuit device comprising:

at least two interfaces to receive configuration access requests, wherein one of the at least two interfaces uses a first communication protocol; and

accessing circuitry to access a configuration space of one or more remote integrated circuit devices in accordance with the received configuration access requests, but to use a second communication protocol which is different than the first communication protocol.

8. The integrated circuit device of claim 7, wherein the at least two interfaces to receive configuration access requests using different communication protocols.

9. The integrated circuit device of claim 7, wherein the at least two interfaces comprise a joint test action group (JTAG) port, an inter-integrated circuit (I2C) port, a processor interface, and/or a peripheral component interface (PCI).

10. The integrated circuit device of claim 7, wherein one of the configuration access requests to be received through the at least two interfaces uses addressing information in a peripheral component interface (PCI) addressing format to identify a target memory location for the configuration access request.

11. The integrated circuit device of claim 7, wherein the accessing circuitry accesses the configuration space of at least two remote integrated circuit devices using different communication protocols.

12. The integrated circuit device of claim 7, wherein the accessing circuitry to access a configuration register in the configuration space of one or more remote integrated circuit devices.

13. A system comprising:

(a) a plurality of remote integrated circuit devices having respective configuration spaces; and

(b) a local integrated circuit device comprising;

(i) at least two interfaces to receive configuration access requests, wherein one of the at least two interfaces uses a first communication protocol; and

(ii) accessing circuitry to access the configuration space of at least one of the plurality of remote integrated circuit devices in accordance with the received configuration access requests, but to;

use a second communication protocol which is different than the first communication protocol.

14. The system of claim 13, wherein the at least two interfaces to receive configuration access requests using different communication protocols.

15. The system of claim 13, wherein the at least two interfaces comprise a joint test action group (JTAG) port, an inter-integrated circuit (I2C) port, a processor interface, and/or a peripheral component interface (PCI).

16. The system of claim 13, wherein one of the configuration access requests to be received through the at least two interfaces uses addressing information in a peripheral component interface (PCI) addressing format to identify a target memory location for the configuration access request.

17. The system of claim 13, wherein the accessing circuitry accesses the configuration space of at least two remote integrated circuit devices using different communication protocols.

18. The system of claim 13, wherein the accessing circuitry accesses a configuration register in the configuration space of one of the plurality of remote integrated circuit devices.

19. The system of claim 13, wherein the local integrated circuit device comprises a system addressing device.

20. The system of claim 13, wherein the plurality of remote integrated circuit devices comprise a system data device, a memory addressing device, a memory data device, an input/output expander bridge, and/or a graphics expander bridge.

21. The system of claim 13, further comprising:

(c) at least two external devices coupled to the at least two interfaces to issue configuration access requests.

22. The system of claim 21, wherein the at least two external devices comprise a processor, a peripheral component interface (PCI) device, a server management device, a test device, and/or a debug device.

23. A system comprising:

(a) one or more processors;

(b) memory;

(c) one or more input/output devices;

(d) one or more remote integrated circuit devices having respective configuration spaces; and

(e) a local integrated circuit device comprising;

(i) at least two interfaces to receive configuration access requests, wherein one of the at least two interfaces uses a first communication protocol; and

(ii) accessing circuitry to access the configuration space of at least one of the one or more remote integrated circuit devices in accordance with the received configuration access requests, but to use a second communication protocol which is different than the first communication protocol.

24. The system of claim 23, wherein the local integrated circuit device comprises a system addressing device;

and

wherein the one or more remote integrated circuit devices comprise a system data device, a memory addressing device, a memory data device, an input/output expander bridge, and/or a graphics expander bridge.