Process parameter extraction

• US 6,553,545 B1
• Filed: 06/29/2000
• Issued: 04/22/2003
• Est. Priority Date: 06/29/2000
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Stinson, Jason C., De La Iglesia, Erik A.
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Dinh, Paul
• Application Number:
  US09/606,484
• Time in Patent Office: 1,027 Days
• Field of Search: 716/1-6, 716/18, 331/1.R, 331/2, 331/46, 331/108.C
• US Class Current: 331/2
• CPC Class Codes: G11C 2029/0403 during or with feedback to manufacture
• CPC Class Codes: H01L 22/34 Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line switching, multiplexing, gating devices G01R19/25; process control with lithography, e.g. dose control, G03F7/20; structures for alignment control by optical means G03F7/70633
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An apparatus includes a test circuit, a first counter and a second counter. The test circuit is fabricated on a semiconductor substrate to generate an oscillating signal. The oscillating signal has a frequency that is dependent on at least in part a parameter of a process used to fabricate the test circuit. The first counter measures a time interval, and the second counter is coupled to the first counter to count a number of periods of the oscillating signal during the time interval.

Claims

1. An apparatus comprising:

a first circuit fabricated on a semiconductor substrate to generate a first oscillating signal that propagates through the first circuit, the first oscillating signal having a frequency dependent on at least in part a parameter of a process used to fabricate the first circuit;

a second circuit fabricated on the semiconductor substrate near the first circuit to generate a second oscillating signal that propagates through the second circuit, a phase relationship existing between the first and second oscillating signals at adjacent points of the first and second circuits; and

a third circuit coupled to the first and second circuits to regulate logical state transitions in the first and second oscillating signals to cause the phase relationship to be near a predetermined value.

2. The apparatus of claim 1, wherein the predetermined value is approximately one hundred eighty degrees.

3. The apparatus of claim 1, wherein the predetermined value is approximately zero degrees.

4. The apparatus of claim 1, wherein the third circuit comprises:

a first flip-flop to regulate the logical state transitions of the first oscillating signal; and

a second flip-flop to regulate the logical state transitions of the second oscillating signal.

5. The apparatus of claim 1, wherein the circuit comprises:

logic to detect edge transitions in at least one of the first and second oscillating signals.

6. The apparatus of claim 1, wherein the first circuit and the third circuit in combination form a ring oscillator.

7. The apparatus of claim 1, wherein at least one of the first and second circuits comprises:

a chain of inverters.

8. The apparatus of claim 1, wherein the first circuit comprises a first chain of at least one inverter, the second circuit comprises a second chain of at least one inverter, and the first chain has a different number of inverters than the second chain.

9. A test apparatus comprising:

a first oscillator fabricated in a semiconductor substrate to generate a first oscillating signal, a frequency of the first oscillating signal being substantially influenced by a first process parameter of the substrate and not being substantially influenced by a second process parameter of the substrate; and

a second oscillator fabricated in the semiconductor substrate to generate a second oscillating signal, a frequency of the second oscillating signal being substantially influenced by the second process parameter and not being substantially influenced by the first process parameter.

10. The test apparatus of claim 9, wherein the first process parameter comprises a n-device process parameter and the second process parameter comprises a p-device parameter.

11. The test apparatus of claim 9, further comprising:

a third oscillator fabricated in the semiconductor substrate to generate a third oscillating signal, a frequency of the third oscillating signal not being substantially influenced by the first and second process parameters.

12. The test apparatus of claim 9, wherein the first and second oscillators are located adjacent to each other.

13. The test apparatus of claim 9, further comprising:

at least one counter to measure at least one of the first and second frequencies.

14. The test apparatus of claim 9, wherein at least one of the first and second oscillators comprises a ring oscillator.

15. A method comprising:

fabricating a first circuit in a semiconductor substrate;

fabricating a second circuit in the semiconductor substrate;

using the first circuit to generate a first oscillating signal;

using the second circuit to generate a second oscillating signal; and

regulating the generation of the first oscillating signal and regulating the generation of the second oscillating signal to establish a phase relationship between the signals, wherein the first oscillating signal has a frequency that is a function of one or more process parameters that characterize a process used to fabricate the first circuit.

16. The method of claim 15, wherein the generation of at least one of the first and second oscillating signals includes using a ring oscillator.

17. The method of claim 15, wherein the regulating comprises:

synchronizing edges of the first and second oscillating signals.

18. A method comprising:

generating a first oscillating signal, a frequency of the first oscillating signal being substantially influenced by a first process parameter of a substrate and not being substantially influenced by a second process parameter of the substrate;

generating a second oscillating signal, a frequency of the second oscillating signal being substantially influenced by a second process parameter and not being substantially influenced by the first process parameter; and

using the first and second oscillating signals to extract at least one of the first and second process parameters.

19. The method of claim 18, wherein the first process parameter comprises a n-type process parameter and the second process parameter comprises a p-type process parameter.

20. The method of claim 18, further comprising:

obtaining a measure of the first and second frequencies to extract at least one of the first and second process parameters.

21. The method of claim 18, further comprising:

generating a third oscillating signal, a frequency of the third oscillating signal not being substantially influenced by the first process parameter of the substrate and not being substantially influenced by the second process parameter.

22. The method of claim 21, further comprising:

using the first, second and third oscillating signals to extract at least one of the first and second process parameters.