Method and apparatus for computing delay correlation effects in digital circuits

• US 6,553,550 B1
• Filed: 03/03/2000
• Issued: 04/22/2003
• Est. Priority Date: 03/05/1999
• Status: Expired due to Fees

• Current Assignee: Daniel L. Notestein, Peter Menegay
• Original Assignee: Daniel L. Notestein, Peter Menegay
• Inventors: Notestein, Daniel L., Menegay, Peter
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): Kik, Phallaka
• Application Number:
  US09/517,917
• Time in Patent Office: 1,145 Days
• Field of Search: 716/1-21, 703/2, 703/14-16, 703/19, 702/79, 702/117-118, 702/125, 702/179-182
• US Class Current: 716/108
• CPC Class Codes: G06F 30/3312 Timing analysis

Abstract

A method to automate techniques for using delay correlation effects to optimize the design of digital circuits, including a graphical method of data-entry and an optimized calculation scheme. It is used in conjunction with, or is part of, a computer program which performs timing analysis of digital circuits. The method calculates the time difference between two user-input timing paths in a circuit which include delay ranges for each gate in the paths along with correlation factors between any pair of gates. The method checks the user-input to determine an optimal calculation procedure. If none exists, it resorts to a calculation based on a sequential search of many possible timing states.

Claims

1. A computer implemented method for performing a circuit timing analysis between any two paths of a timing chain using correlation information between timing relationships, including delays, setups, or holds, in a general fashion, comprising the steps of:

identifying the timing relationships required by the analysis,

listing all possible sequences of timing relationships in the analysis,

deciding to maximize one of the timing paths while minimizing the other,

and then selecting the sequence which produces minimum and maximum arrival times.

4. The method of claims 1, 2, or 3, further comprising a step for choosing which of the three previous methods to use based on a number of delays or the relationship of the delays to each other in the circuit.

2. A computer implemented method for performing a circuit timing analysis between any two paths of a timing chain using correlation information between timing relationships, including delays, setups, or holds, in an optimized fashion, comprising the steps of:

listing only unique pairs of correlation combinations between the paths, while ignoring the other correlation pairs,

finding the arrival time of one path with respect to the other path for each correlation combination,

and then summing the arrival times for all the correlation combinations, to produce the overall arrival time of a first path with respect to a second path.

3. A computer implemented method for performing a circuit timing analysis between any two paths of a timing chain using correlation information between timing relationships, including delays, setups or holds, in an optimized fashion, comprising the steps of:

grouping all the delays using a single common delay correlation percentage,

expressing the grouping of delays in each path as a single delay,

and then finding the arrival time of a first path with respect to a second path in a single step.

5. A computer implemented method for performing a circuit timing analysis between any two paths of a timing chain using correlation information between timing relationships, including delays and constraints, comprising the steps of:

accepting input of correlation information for the constraints,

performing correlation analysis with the constraints,

and then determining whether or not any constraints have been violated.

6. A computer implemented method for performing a circuit timing analysis using correlation information, comprising a step of grouping three or more timing relationships, including delays, setups, or holds, in such a manner that the correlation information is specified between all possible pairs in the grouping of timing relationships, by a set of the correlation information required by a single pair of timing relationships.