Amplifier system and method that approximate constant impedance and quiescent outputs during forward and reverse modes

• US 6,556,075 B1
• Filed: 08/24/2001
• Issued: 04/29/2003
• Est. Priority Date: 08/24/2001
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Jordan, Edward Perry
• Primary Examiner(s): Tokar, Michael
• Assistant Examiner(s): Nguyen, Linh V
• Application Number:
  US09/939,437
• Time in Patent Office: 613 Days
• Field of Search: 330/51, 330/86, 330/144, 330/57
• US Class Current: 330/51
• CPC Class Codes: H03F 1/14 by use of neutralising means
• CPC Class Codes: H03F 2203/30078 A resistor being added in the pull stage of the SEPP amplifier
• CPC Class Codes: H03F 2203/30108 the pull transistor of the SEPP amplifier being a cascode current mirror
• CPC Class Codes: H03F 2203/30111 A resistor being added in the push stage of the SEPP amplifier
• CPC Class Codes: H03F 2203/30141 the push transistor of the SEPP amplifier being a cascode current mirror
• CPC Class Codes: H03F 2203/7212 the gated amplifier being switched on or off by switching off or on a feedback control loop of the amplifier
• CPC Class Codes: H03F 3/3066 the collectors of complementary power transistors being connected to the output
• CPC Class Codes: H03F 3/3069 the emitters of complementary power transistors being connected to the output
• CPC Class Codes: H03F 3/72 Gated amplifiers, i.e. amplifiers which are rendered operative or inoperative by means of a control signal

Abstract

Amplifier systems and methods are provided which closely approximate a constant output impedance and a constant quiescent output signal during forward and reverse modes of operation. The systems can be realized with small, inexpensive components that are compatible with integrated-circuit fabrication processes. A system embodiment includes a signal amplifier, a feedback path that is coupled across at least part of the signal amplifier to reduce its impedance, a reverse amplifier which is coupled to drive at least a feedback portion of the feedback path and a signal generator which controls operational timing of the signal amplifier and reverse amplifier. Another system embodiment includes an error-current canceler that cancels error currents of the signal amplifier with substantially equal and opposite correction currents.

Claims

1. An amplifier system which approximates a constant output impedance during forward and reverse modes of operation, comprising:

a signal amplifier which has a signal-amplifier output impedance in an enable state and transitions from said enable state to a disable state in response to a signal-amplifier disable signal DS_sa;

a feedback path coupled to said signal amplifier to reduce said signal-amplifier output impedance to a substantially lower enable state output impedance Z_outenbl;

a reverse amplifier which has a reverse-amplifier output impedance that reduces from an off output impedance to a substantially lower on output impedance as it transitions from an off state to an on state in response to a reverse-amplifier enable signal ES_ra wherein said reverse amplifier is coupled to said feedback path to;

a) interrupt said feedback path in said on state to thereby replace said enable state output impedance Z_outenbl with the substantially higher signal-amplifier output impedance; and

b) realize a disable state output impedance Z_outdsbl that approximates said enable state output impedance Z_outenbl;

and

a signal generator which provides said signal-amplifier disable signal DS_sa and said reverse-amplifier enable signal ES_ra with said reverse-amplifier enable signal ES_ra initiated before and terminated after said signal-amplifier disable signal DS_sa.

2. The amplifier system of claim 1, wherein said feedback path is coupled across at least part of said signal amplifier and said reverse amplifier is coupled to drive at least a portion of said feedback path.

3. The amplifier system of claim 1, wherein said feedback path comprises at least one resistor coupled across at least a portion of said signal amplifier.

4. The amplifier system of claim 3, wherein:

said signal amplifier has an output port;

said at least one resistor comprises first and second serially-connected resistors with said first resistor coupled to said output port; and

said first resistor is selected to combine with said on output impedance to form said disable state output impedance Z_outdsbl.

5. The amplifier system of claim 1, wherein said signal amplifier and said reverse amplifier are biased to generate substantially equal quiescent output signals to thereby reduce transient signals.

6. The amplifier system of claim 1, wherein said signal amplifier includes a complimentary output stage that provides said signal-amplifier output impedance.

7. The amplifier system of claim 6, wherein complimentary output stage is a complimentary common-emitter output stage.

8. The amplifier system of claim 1, wherein said signal amplifier is a transimpedance amplifier.

9. The amplifier system of claim 1, wherein said reverse amplifier includes a complimentary output stage that provides said reverse-amplifier output impedance.

10. The amplifier system of claim 9, wherein complimentary output stage is a complimentary common-collector output stage.

11. An amplifier system which approximates a constant output impedance and a constant quiescent output signal during forward and, reverse modes of operation, comprising:

a signal amplifier which has a signal-amplifier output impedance in an enable state and transitions from said enable state to a disable state in response to a signal-amplifier disable signal DS_sa;

a feedback path coupled to said signal amplifier to reduce said signal-amplifier output impedance to a substantially lower enable state output impedance Z_outenbl;

a reverse amplifier which has a reverse-amplifier output impedance that reduces from an off output impedance to a substantially lower on output impedance as it transitions from an off state to an on state in response to a reverse-amplifier enable signal ES_ra wherein said reverse amplifier is coupled to said feedback path to;

a) interrupt said feedback path in said on state to thereby replace said enable state output impedance Z^out_enbl with the substantially higher signal-amplifier output impedance; and

b) provide a disable state output impedance Z_outdsbl that approximates said enable state output impedance Z_outenbl;

a signal generator which provides said signal-amplifier disable signal D_sa and said reverse-amplifier enable signal ES_ra with said reverse-amplifier enable signal ES_ra initiated before said signal-amplifier disable signal DS_sa and terminated after said signal-amplifier disable signal DS_sa;

and

an error-current canceler that includes;

a) a current sensor that generates a sense signal in response to an output error current I_err that is generated by said signal amplifier as it transitions between said enable and disable states; and

b) a correction-current generator that cancels, in response to said sense signal, said output error current I_err with a substantially equal and opposite correction current signal I_crctn.

12. The amplifier system of claim 11, wherein said signal amplifier includes a complimentary output stage that provides said signal-amplifier output impedance, said current sensor comprises a complementary sense stage that is coupled to said complimentary output stage to sense said output error current I_err and generate said sense signal, and said correction-current generator comprises first and second current mirrors that;

provide said correction current signal I_crctn in response to said sense signal.

13. The amplifier system of claim 11, wherein said feedback path is coupled across at least part of said signal amplifier and said reverse amplifier is coupled to drive at least a portion of said feedback path.

14. The amplifier system of claim 13, wherein said correction-current generator includes a current steerer that steers said sense signal to said first and second current mirrors.

15. The amplifier system of claim 11, wherein said signal generator includes a clamp that disables at least one of said current sensor and said correction-current generator during said enable state.

16. The amplifier system of claim 11, wherein said signal amplifier and said reverse amplifier are biased to generate substantially equal quiescent output signals.

17. The amplifier system of claim 11, wherein said signal amplifier includes a complimentary output stage that provides said signal-amplifier output impedance.

18. The amplifier system of claim 11, wherein:

said signal amplifier has an output port;

said feedback path comprises first and second serially-connected resistors with said first resistor coupled to said output port;

and

said first resistor is selected to combine with said on output impedance to form said disable state output impedance Z_outdsbl.

19. The amplifier system of claim 11, wherein said signal generator is configured to gradually initiate and terminate said signal-amplifier disable signal D_sa.

20. A method for approximating a constant output impedance and a constant quiescent output signal during forward and reverse modes of operation of an amplifier system, comprising the steps of:

providing a signal amplifier which has a signal-amplifier output impedance in an enable state and transitions from said enable state to a disable state in response to a signal-amplifier disable signal D_sa;

coupling a feedback path to said signal amplifier to reduce said signal-amplifier output impedance to a substantially lower enable state output impedance Z_outenbl;

driving said feedback path with a reverse amplifier which has a reverse-amplifier output impedance that reduces from an off output impedance to a substantially lower on output impedance as it transitions from an off state to an on state in response to a reverse-amplifier enable signal ES_ra, said reverse amplifier thus;

a) interrupting said feedback path in said on state and replacing said enable state output impedance Z_outenbl with the substantially higher signal-amplifier output impedance; and

b) providing a disable state output impedance Z_outdsbl that approximates said enable state output impedance Z_outenbl;

and

providing said signal-amplifier disable signal D_sa and said reverse-amplifier enable signal ES_ra with said reverse-amplifier enable signal ES_ra initiated before said signal-amplifier disable signal DS_sa and terminated after said signal-amplifier disable signal DS_sa.

21. The method of claim 20, further including the steps of:

generating a sense signal in response to an output error current I_err that is generated by said signal amplifier as it transitions between said enable and disable states; and

in response to said sense signal, cancelling said output error current I_err with a substantially equal and opposite correction current signal I_crctn.

22. The method of claim 20, further including the step of biasing said signal amplifier and said reverse amplifier to generate substantially equal quiescent output signals and thereby further reducing said transient signals.

23. The method of claim 20, wherein said coupling step includes the step of forming said feedback path with at least one resistor.

24. The method of claim 20, wherein said providing step includes the step of gradually initiating and terminating said signal-amplifier disable signal D_sa.

25. A variable-gain amplifier that generates a programmable output signal in response to an input signal, comprising:

a programmable attenuator that converts said input signal to a differential input current signal with a programmable amplitude; and

an amplifier system which provides said output signal in response to said differential input current signal and which approximates a constant output impedance during forward and reverse modes of operation;

wherein said amplifier system includes;

a signal amplifier which has a signal-amplifier output impedance in an enable state and transitions from said enable state to a disable state in response to a signal-amplifier disable signal DS_sa;

a feedback path coupled to said signal amplifier to reduce said signal-amplifier output impedance to a substantially lower enable state output impedance Z_outenbl;

a reverse amplifier which has a reverse-amplifier output impedance that reduces from an off output impedance to a substantially lower on output impedance as it transitions from an off state to an on state in response to a reverse-amplifier enable signal ES_ra wherein said reverse amplifier is coupled to said feedback path to;

a) interrupt said feedback path in said on state to thereby replace said enable state output impedance Z_outenbl with the substantially higher signal-amplifier output impedance;

and

b) realize a disable state output impedance Z_outdsbl that approximates said enable state output impedance Z_outenbl ;

and

a signal generator which provides said signal-amplifier disable signal DS_sa and said reverse-amplifier enable signal ES_ra with said reverse-amplifier enable signal ES_ra initiated before and terminated after said signal-amplifier disable signal DS_sa.

26. The amplifier of claim 25, wherein said amplifier system further comprises an error-current canceler that includes:

a current sensor that generates a sense signal in response to an output error current I_err that is generated by said signal amplifier as it transitions between said enable and disable states; and

a correction-current generator that cancels in response to said sense signal, said output error current I_err with a substantially equal and opposite correction current signal I^crctn.

27. The amplifier of claim 25, wherein said programmable attenuator adjusts its attenuation in response to a digital signal and further including:

a data register that receives said digital word; and

a data latch that presents said digital word to said programmable attenuator.

28. The amplifier of claim 27, further including a buffer amplifier that precedes said programmable attenuator.