Real-time test controller

• US 6,557,115 B2
• Filed: 11/14/2001
• Issued: 04/29/2003
• Est. Priority Date: 11/10/1993
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Compaq Computer Corporation (HP Inc.)
• Inventors: Keels, Kenneth G., Brisky, Philip J., Gillenwater, Russel L.
• Primary Examiner(s): LE, DIEU MINH T
• Application Number:
  US09/992,193
• Publication Number:
  US 20020053045A1
• Time in Patent Office: 531 Days
• Field of Search: 714/25, 714/26, 714/27, 714/30, 714/718, 714/724
• US Class Current: 714/25
• CPC Class Codes: G01R 31/2834 Automated test systems [ATE]; using microprocessors or computers G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736
• CPC Class Codes: G06F 11/2273 Test methods

Abstract

The real-time test controller maintains a failure database containing a history of past failures for devices under test and selectively sorts the history for the device to be tested. The diagnostic testing sequence is then rearranged with tests having higher failure rates being conducted first. If faults are detected, a message is provided to the operator and the failure database is either manually or automatically updated with the latest fault information. In this manner, a continuously updated history of faults is maintained and the most efficient testing sequence is followed, resulting in significant time and cost savings.

Claims

1. A method for testing manufactured products, comprising:

conducting at least one diagnostic test on a manufactured product at each of a plurality of testing locations;

moving the manufactured product between the plurality of testing locations;

storing test failure data indicative of failure rates of previously failed diagnostic tests conducted at each of the plurality of testing locations from previous test runs;

reading, before the beginning of the current test run, a selected amount of the stored test failure data indicative of failure rates and determining an optimum sequence for using the plurality of diagnostic tests in the current test run by sorting the diagnostic tests in order of the failure rates of the previously failed diagnostic tests; and

moving the manufactured product between the plurality of testing means in accordance with the optimum sequence for using the plurality of diagnostic tests in the current run.

2. A system for testing manufactured products, comprising:

a storage medium, located on the manufactured products, for storing a plurality of diagnostic tests for use in testing the manufactured products;

a plurality of testing stations, located external to the manufactured products, for accessing the storage medium and testing each of the manufactured products using the plurality of diagnostic tests stored in the storage medium on the products in a predetermined sequence;

a memory for storing test failure data indicative of failure rates of previously failed diagnostic tests;

a command module for reading a selected amount of the stored test failure data indicative of failure rates and determining an optimum sequence for using the plurality of diagnostic tests for a new test run by sorting the diagnostic tests in order of the failure rates of the previously failed diagnostic tests; and

a test controller for, before the beginning of a new test run, replacing the predetermined sequence with the optimum sequence.

3. The system of claim 2, wherein the storage medium comprises:

a read only memory for storing a first plurality of diagnostic tests; and

a random access memory for storing at least one additional diagnostic test or portion of a diagnostic test.

4. A real-time test controller, comprising:

a command module;

a failure database, coupled to the command module, for storing failure data from diagnostic tests;

a diagnostic optimizer, coupled to the failure database, for producing an optimized sequence of diagnostics for a device under test from data in the failure database; and

a command line interface, coupled to the diagnostic optimizer, for re-sequencing a plurality of diagnostic tests for the device under test to match the optimized sequence of diagnostics.

5. The real-time test controller of claim 4, further comprising a plurality of diagnostic tests coupled to the command line for testing devices.

6. The real-time test controller of claim 4, wherein the diagnostic optimizer is further configured to produce, from the data in the failure database, a fault spectrum of faults occurring in previous testing.

7. The real-time test controller of claim 4, wherein the command module further comprises a graphical user interface, including a debug mode, and a feature to automatically print error tags.

8. The real-time test controller of claim 4, wherein the command module further comprises a user interface, including a feature for automatic programming of manufacturing data.

9. The real-time test controller of claim 4, wherein the command module further comprises a user interface, including a feature for manual programming of manufacturing data.

10. The real-time test controller of claim 4, wherein the command module further comprises a user interface, including a terminal emulation mode.

11. The real-time test controller of claim 4, wherein the command module further comprises a user interface, including a feature for creating, saving and loading customized testing sequences.

12. The real-time test controller of claim 4, wherein the command line interface resides in the device under test.

13. The real-time test controller of claim 4, wherein the command line interface has a standardized input line and a standardized output line.

14. The real-time test controller of claim 4, further comprising a universal asynchronous receiver transmitter (UART) for processing communication between the device under test and the real-time test controller.

15. The real-time controller of claim 4, wherein the command line interface further comprises:

a universal asynchronous receiver transmitter (UART) for processing communication between the device under test and the real-time test controller;

a library, coupled to the UART, for providing commands enabling interaction with the UART;

a command line interpreter, coupled to the library, for interpreting incoming commands from the UART and sending commands to the UART; and

a parser, coupled to the command line interpreter, for extracting data from an incoming command and locating an actual address of the command to be executed.

16. The real-time controller of claim 15, wherein the actual address of the command to be executed refers to a location in read-only memory (ROM).

17. The real-time controller of claim 16, wherein the command line interface further comprises a test update random access memory (RAM), for receiving updated diagnostic tests.

18. A system for testing manufactured products, comprising:

conducting means for conducting at least one diagnostic test on a manufactured product at each of a plurality of testing locations;

first moving means, coupled to the conducting means, for moving the manufactured product between the plurality of testing locations;

storing means, coupled to the conducting means, for storing test failure data indicative of failure rates of previously failed diagnostic tests conducted at each of the plurality of testing locations from previous test runs;

reading means, coupled to the storing means, for reading, before the beginning of the current test run, a selected amount of the stored test failure data indicative of failure rates and determining an optimum sequence for using the plurality of diagnostic tests in the current test run by sorting the diagnostic tests in order of the failure rates of the previously failed diagnostic tests; and

second moving means, coupled to the conducting means, for moving the manufactured product between the plurality of testing means in accordance with the optimum sequence for using the plurality of diagnostic tests in the current run.