Efficient parallel testing of semiconductor devices using a known good device to generate expected responses

• US 6,559,671 B2
• Filed: 07/29/2002
• Issued: 05/06/2003
• Est. Priority Date: 03/01/1999
• Status: Expired due to Fees

• Current Assignee: FormFactor Incorporated
• Original Assignee: FormFactor Incorporated
• Inventors: Miller, Charles A., Roy, Richard S.
• Primary Examiner(s): Cuneo, Kamand
• Assistant Examiner(s): KOBERT, RUSSELL MARC
• Application Number:
  US10/208,173
• Publication Number:
  US 20020175697A1
• Time in Patent Office: 281 Days
• Field of Search: 324/158.1, 324/765, 702/117-120, 714/714, 714/719, 714/733, 714/735, 714/736, 714/737
• US Class Current: 324/762.01
• CPC Class Codes: G01R 31/31905 Interface with the device under test [DUT], e.g. arrangements between the test head and the DUT, mechanical aspects, fixture
• CPC Class Codes: G01R 31/3193 with comparison between actual response and known fault free response receiver details G01R31/31924

Abstract

A system for testing integrated circuit devices is disclosed in which a tester communicates with a known good device through a channel. Tester-DUT interface circuitry is provided for monitoring the channel while the tester is writing data as part of a test sequence to locations in the known good device. In response, the interface circuitry writes the data to corresponding locations in each of a number of devices under test (DUTs). The interface circuitry monitors the channel while the tester is reading from the locations in the known good device (KGD), and in response performs a comparison between DUT data read from the corresponding locations in the DUTs and expected responses obtained form the KGD.

Claims

1. A method of testing a plurality of semiconductor devices, each corresponding to a reference device, said method comprising:

communicating to said reference device via a communication channel test data generated by a tester;

communicating to said tester via said communication channel response data generated by said reference device in response to said test data;

monitoring said communication channel;

upon detecting communication of test data on said channel, writing said test data to each of said plurality of semiconductor devices;

upon detecting communication of response data on said channel, reading corresponding response data from said plurality of semiconductor devices, and

comparing said response data from said reference device with said corresponding response data read from said plurality of semiconductor devices.

2. The method of claim 1 further comprising communicating results of comparing said response data from said reference device with said corresponding response data read from said plurality of semiconductor devices to said tester over said communication channel.

3. The method of claim 1 further comprising communicating results of comparing said response data from said reference device with said corresponding response data read from said plurality of semiconductor devices to said tester over a second communication channel.

4. The method of claim 1 further comprising storing results of comparing said response data from said reference device with said corresponding response data read from said plurality of semiconductor devices.

5. The method of claim 1 further comprising comparing timing data corresponding to said reference device with timing data corresponding to said semiconductor devices.