DC compensation system for a wireless communication device configured in a zero intermediate frequency architecture

• US 6,560,448 B1
• Filed: 10/02/2000
• Issued: 05/06/2003
• Est. Priority Date: 10/02/2000
• Status: Expired due to Term

• Current Assignee: M-Red Inc. (Quest Patent Research Corporation)
• Original Assignee: Intersil Americas LLC (Renesas Electronics Corporation)
• Inventors: Webster, Mark A., Schultz, R. Douglas, Baldwin, Keith R., Prentice, John S., Landy, Patrick J.
• Primary Examiner(s): Le, Thanh Cong
• Assistant Examiner(s): LE, LANA N
• Application Number:
  US09/678,901
• Time in Patent Office: 946 Days
• Field of Search: 455/324, 455/296, 455/303, 455/305, 455/232, 455/234.1, 375/341
• US Class Current: 455/234.1
• CPC Class Codes: H03D 3/008 Compensating DC offsets
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A wireless communication device including a radio frequency (RF) circuit, a ZIF transceiver and a baseband processor. The ZIF transceiver includes an RF mixer circuit that converts the RF signal to a baseband input signal, a summing junction that subtracts a DC offset from the baseband input signal to provide an adjusted baseband input signal, and a baseband amplifier that receives the adjusted baseband input signal and that asserts an amplified input signal based on a gain adjust signal. The baseband processor includes gain control logic, DC control logic and a gain interface. The gain control logic receives the amplified input signal, estimates input signal power and asserts the gain adjust signal in an attempt to keep the input signal power at a target power level. The DC control logic estimates an amount of DC in the amplified input signal and provides the DC offset in an attempt to reduce DC in the amplified input signal. The gain interface converts gain levels between the gain control logic and the DC control logic. The RF signal may include in-phase (I) and quadrature (Q) portions, where the RF mixer circuit splits I and Q baseband input signals from the RF signal. Operation is substantially identical for both I and Q channels. The DC control logic operates to remove or otherwise eliminate DC from the received signal that is provided to decoders in the baseband processor.

Claims

1. A DC compensation system for a wireless communication device configured in a zero intermediate frequency (ZIF) architecture, comprising:

a combiner that combines a DC offset signal with an input signal and that provides an adjusted input signal;

a gain amplifier that receives the adjusted input signal and that provides an amplified input signal based on a gain adjust signal;

a gain feedback circuit that receives the amplified input signal, that estimates input signal power and that provides the gain adjust signal in an attempt to maintain the input signal power at a target power level;

a DC estimator that estimates a DC level in the amplified input signal and that provides a DC estimate signal;

a DC amplifier that receives the DC estimate signal and that provides the DC offset signal based on a gain conversion signal; and

a gain converter that receives the gain adjust signal and that provides the gain conversion signal to the DC amplifier.

2. The DC compensation system of claim 1, wherein the gain converter converts between gain ranges of the gain amplifier and the DC amplifier.

3. The DC compensation system of claim 1, further comprising:

the gain amplifier having a logarithmic gain scale;

the DC amplifier having a linear gain scale; and

the gain converter converting between the logarithmic and linear gain scales.

4. The DC compensation system of claim 1, further comprising:

an analog to digital converter that converts the amplified input signal into a digital input signal;

the DC estimator estimating a DC level of the digital input signal and providing a digital DC estimate signal;

the DC amplifier receiving the digital DC estimate signal and providing a digital DC offset signal; and

a DC digital to analog converter that converts the digital DC offset signal to a corresponding analog DC offset voltage and that provides the analog DC offset voltage to the combiner.

5. The DC compensation system of claim 4, further comprising:

the gain feedback circuit receiving the digital input signal and providing a digital gain adjust signal;

a gain DAC that converts the digital gain adjust signal to an analog gain adjust signal that controls gain of the gain amplifier; and

the gain converter receiving the digital gain adjust signal and providing a digital gain conversion signal to control the gain of the DC amplifier.

6. A wireless communication device, comprising:

a ZIF transceiver, comprising;

an RF mixer circuit that converts an RF signal to a baseband input signal;

a combiner that combines a DC offset with the baseband input signal to provide an adjusted baseband input signal; and

a baseband amplifier that receives the adjusted baseband input signal and that asserts an amplified input signal based on a gain adjust signal; and

a baseband processor, comprising;

gain control logic that receives the amplified input signal, that estimates input signal power and that asserts the gain adjust signal in an attempt to keep the input signal power at a target power level;

DC control logic that estimates an amount of DC in the amplified input signal and that provides the DC offset in an attempt to reduce DC in the amplified input signal; and

a gain interface that converts gain levels between the gain control logic and the DC control logic.

7. The wireless communication device of claim 6, further comprising:

the DC control logic further comprising;

a DC estimator that estimates an amount of DC in the amplified input signal and that provides a DC estimate signal; and

a DC amplifier that receives the DC estimate signal and that provides the DC offset based on a gain conversion signal; and

the gain interface including a gain converter that receives the gain adjust signal and that provides the gain conversion signal.

8. The wireless communication device of claim 7, wherein the gain converter converts between gain ranges of the baseband amplifier and the DC amplifier.

9. The wireless communication device of claim 7, further comprising:

the baseband amplifier having a logarithmic gain scale;

the DC amplifier having a linear gain scale; and

the gain converter converting between the logarithmic and linear gain scales.

10. The wireless communication device of claim 6, further comprising:

the ZIF transceiver asserting the amplified input signal as an analog signal; and

the baseband processor further comprising;

an analog to digital converter that converts the amplified input signal to a digital input signal;

the gain control logic receiving the digital input signal and providing a digital gain adjust signal;

a gain digital to analog converter (DAC) that receives the digital gain adjust signal and that provides the gain adjust signal to the baseband amplifier;

the DC control logic receiving the digital input signal and providing a digital DC offset signal; and

a DC DAC that receives the digital DC offset signal and that provides the DC offset to the combiner.

11. The wireless communication device of claim 6, wherein:

the RF signal includes in-phase (I) and quadrature (Q) portions;

the RF mixer circuit including I and Q channel mixer circuits, each splitting the RF signal into respective I and Q baseband input signals;

the combiner including I and a Q channel combiners that subtract respective I and Q DC offsets from the I and Q baseband input signals, respectively, to provide I and Q adjusted baseband input signals;

the baseband amplifier including I and Q channel amplifiers that receive the I and Q adjusted baseband input signals, respectively, and that assert I and Q amplified input signals, respectively, based on the gain adjust signal;

the DC control logic estimating an amount of DC in each of the I and Q amplified input signals and providing the I and Q DC offsets in an attempt to reduce DC in the I and Q channels, respectively; and

the gain interface comprising I and Q interfaces that each convert gain levels between the gain control logic and the DC control logic.

12. A method of reducing DC in a wireless zero intermediate frequency (ZIF) device, comprising:

converting a received radio frequency (RF) signal to a baseband signal;

combining a DC offset with the baseband signal to achieve an adjusted baseband signal;

amplifying the adjusted baseband signal based on a gain signal to achieve an amplified input signal;

estimating a power level of an input baseband signal from the amplified input signal;

adjusting the gain signal to achieve a target power level of the input baseband signal;

measuring a DC level of the amplified input signal to obtain a DC estimate;

amplifying the DC estimate based on a gain conversion signal to provide the DC offset; and

generating the gain conversion signal based on the gain signal.

13. The method of claim 12, wherein the generating the gain conversion signal comprises converting between gain ranges.

14. The method of claim 13, wherein the generating the gain conversion signal further comprises converting between logarithmic and linear gain scales.

15. The method of claim 12, wherein the combining a DC offset from the baseband signal comprises subtracting the DC offset from the baseband signal.

16. The method of claim 12, wherein the amplifying the DC estimate comprises attenuating the DC estimate to provide the DC offset.

17. The method of claim 16, wherein:

the attenuating the DC estimate further comprises inverting the DC estimate to provide the DC offset; and

wherein the combining a DC offset from the baseband signal comprises adding the DC offset to the baseband signal.