Switched capacitor array circuit for use in DC-DC converter and method
First Claim
1. A capacitor array circuit connected to an input node, an output node and a third node, said capacitor array circuit comprising:
- first and second capacitors, with each capacitor having first and second terminals;
switching circuitry coupled to the first and second capacitors and to the input, output and third node;
control circuitry coupled to the switching circuitry and operative to sequentially switch the array circuit through at least three different states so that a voltage developed across each of the first and second capacitors is a fixed proportion of a voltage at the input, node, so that the array circuit has a fixed gain when switched through the at least three different states, so that at least one of the first and second capacitors is connected intermediate two of the input, output and third nodes in each of the three states and so that each of the first and second capacitors has a connection relative to the input, output and third node which changes in at least one of the three states and wherein in at least one of the at least three different states, none of the first and second capacitors is connected between the input and output nodes.
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Accused Products
Abstract
A capacitor array circuit having at least two capacitors, switching circuitry coupled to the capacitors and to input, output and common nodes and control circuitry. The control circuitry operates to sequentially switch the array through three different states so that a voltage is developed across each of the capacitors which is at a fixed value proportional to a voltage present at the input node. The fixed and thus determinate voltage drop across each of the capacitors operates to define voltages at any nodes intermediate the capacitors thereby, among other things, insuring reliable operation of the capacitor array circuit.
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Citations
122 Claims
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1. A capacitor array circuit connected to an input node, an output node and a third node, said capacitor array circuit comprising:
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first and second capacitors, with each capacitor having first and second terminals;
switching circuitry coupled to the first and second capacitors and to the input, output and third node;
control circuitry coupled to the switching circuitry and operative to sequentially switch the array circuit through at least three different states so that a voltage developed across each of the first and second capacitors is a fixed proportion of a voltage at the input, node, so that the array circuit has a fixed gain when switched through the at least three different states, so that at least one of the first and second capacitors is connected intermediate two of the input, output and third nodes in each of the three states and so that each of the first and second capacitors has a connection relative to the input, output and third node which changes in at least one of the three states and wherein in at least one of the at least three different states, none of the first and second capacitors is connected between the input and output nodes. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58)
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59. A capacitor array circuit connected to an input node, an output node and a third node, said capacitor array circuit comprising:
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first and second capacitors, with each capacitor having first and second terminals;
switching circuitry coupled to the first and second capacitors and to the input, output and third node;
control circuitry operative to sequentially switch the array circuit through first, second and third different states, wherein in the first state the first and second capacitors are connected in series between two of the nodes, in the second state, the first capacitor is connected between two of the nodes and in the third state the second capacitor is connected between two of the nodes and wherein the array circuit has a fixed gain when the array circuit is switched through the first, second and third states and in at least one of the first, second and third states, none of the first and second capacitors is connected between the input and output nodes. - View Dependent Claims (60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101)
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102. A method of controlling a capacitor array circuit coupled to an input node, an output node and a third node, with the circuit including first and second capacitors, said method comprising:
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switching the array circuit to a first state where the first and second capacitors are connected in series between two of the nodes;
switching the array circuit from the first state to a second state, different than the first state and where at least one of the first and second capacitors is connected between two of the input, output and third nodes;
switching the array circuit from the second state to a third state, different than the first and second states and where at least one of the first and second capacitors is connected between two of the input, output and third nodes, so that a voltage across each capacitor is a fixed proportion of a voltage at the input node and so that the array circuit has a fixed gain when the array circuit is in the first, second and third states and wherein in at least one of the first, second and third states, none of the first and second capacitors is connected between the input and output nodes. - View Dependent Claims (103, 104, 105, 106, 107, 108, 109)
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110. A method of controlling a capacitor array circuit coupled to an input node an output node and a third node, with the circuit including first, second and third capacitors, said method comprising:
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switching the array circuit to a first state where the first and second capacitors are connected in series between two of the nodes;
switching the array circuit from the first state to a second state, different than the first state where at least one of the capacitors is connected between two of the nodes;
switching the array circuit from the second state to a third state, different than the first and second states, where at least one of the capacitors is connected between two of the nodes; and
switching the array circuit from the third state to a fourth state, different from the first, second and third states, where at least one of the capacitors is connected between two of the nodes and wherein the array circuit has a fixed array gain in the first, second and third states and wherein in at least one of the first, second, third and fourth states, none of the first, second and third capacitors is connected between the input and output nodes. - View Dependent Claims (111, 112, 113, 114)
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115. A capacitor array circuit connected to an input node, an output node and a third node, said capacitor array circuit comprising:
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first, second and third capacitors, with each capacitor having first and second terminals;
switching circuitry coupled to the first, second and third capacitors and to the input, output and third node;
control circuitry coupled to the switching circuitry and operative to sequentially switch the array circuit through at least three different states so that a voltage developed across each of the first, second and third capacitors is a fixed proportion of a voltage at the input node and wherein the array circuit has a fixed array gain in the first, second and third states, wherein each of the first, second and third capacitors is connected intermediate two of the input, output and third nodes in each of the first, second and third states and wherein in at least one of the first, second and third states, none of the first, second and third capacitors is connected between the input and output nodes. - View Dependent Claims (116, 117, 118, 119, 120, 121, 122)
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Specification