Circuits and methods for extending the input common mode voltage range of JFET op-amps
First Claim
1. A method for improving the input common mode voltage range of a JFET op-amp, the JFET op-amp having an inverting and an non-inverting input and a plurality of current sources, the method comprising:
- providing a JFET op-amp having a BJT input differential pair and a JFET pair connected as followers for the BJT pair;
maintaining the JFET pair in a linear region of operation when the inputs of the JFET op-amp approach ground;
providing a clamping transistor pair to reduce a source current in the JFET pair; and
diverting a saturating current from a BJT current source from the plurality of current sources to increase the gate-to-source voltage of the JFET pair.
3 Assignments
0 Petitions
Accused Products
Abstract
Circuits and methods for extending the input common mode voltage range of a JFET op-amp are provided. The circuits and methods consist of modifying the input stage of a JFET op-amp to include a BJT pair as the input differential pair and use a JFET pair as followers. Using the BJTs as the input differential pair enables the JFET followers to operate in the linear region of operation when the op-amp'"'"'s input is approaching ground, thereby increasing the negative common mode voltage range. The positive common mode voltage range is increased by reducing the source current in the JFET pair and using a transistor pair as clamping transistors.
-
Citations
24 Claims
-
1. A method for improving the input common mode voltage range of a JFET op-amp, the JFET op-amp having an inverting and an non-inverting input and a plurality of current sources, the method comprising:
-
providing a JFET op-amp having a BJT input differential pair and a JFET pair connected as followers for the BJT pair;
maintaining the JFET pair in a linear region of operation when the inputs of the JFET op-amp approach ground;
providing a clamping transistor pair to reduce a source current in the JFET pair; and
diverting a saturating current from a BJT current source from the plurality of current sources to increase the gate-to-source voltage of the JFET pair. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A JFET op-amp circuit having an extended input common mode voltage range, the JFET op-amp circuit having an inverting and an non-inverting input and a plurality of current sources, the circuit comprising:
-
a BJT input differential pair;
a JFET pair connected as followers for the BJT pair;
a clamping transistor pair to reduce a source current in the JFET pair; and
a BJT collector ring around a BJT current source from the plurality of current sources. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
-
-
18. A JFET op-amp circuit having an extended input common mode voltage range, the JFET op-amp circuit having an inverting and an non-inverting input and a plurality of current sources, the JFET op-amp circuit comprising:
-
a BJT input differential pair;
a JFET pair connected as followers for the BJT pair;
means for maintaining the JFET pair in a linear region of operation when the inputs of the JFET op-amp circuit approach ground;
means for reducing a source current in the JFET pair; and
means for diverting a saturating current from a BJT current source from the plurality of current sources to increase the gate-to-source voltage of the JFET pair. - View Dependent Claims (19, 20, 21, 22, 23, 24)
-
Specification