Precision crystal oscillator circuit used in microcontroller

• US 6,563,391 B1
• Filed: 04/25/2001
• Issued: 05/13/2003
• Est. Priority Date: 10/26/2000
• Status: Expired due to Term

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Mar, Monte
• Primary Examiner(s): Mis, David C.
• Application Number:
  US09/842,966
• Time in Patent Office: 748 Days
• Field of Search: 331/1.A, 331/34, 331/57, 331/116.R, 331/116.FE, 331/117.R, 331/117.FE, 331/158, 331/173, 331/177.R, 331/179
• US Class Current: 331/116.00R
• CPC Class Codes: G06F 1/08 Clock generators with changeable or programmable clock frequency
• CPC Class Codes: G06F 1/32 Means for saving power
• CPC Class Codes: H03B 5/06 Modifications of generator to ensure starting of oscillations
• CPC Class Codes: H03B 5/364 the amplifier comprising field effect transistors H03B5/366 takes precedence
• CPC Class Codes: H03K 3/012 Modifications of generator to improve response time or to decrease power consumption
• CPC Class Codes: H03K 3/014 Modifications of generator to ensure starting of oscillations
• CPC Class Codes: H03K 3/02315 Stabilisation of output, e.g. using crystal

Abstract

A microcontroller is disclosed that includes a crystal oscillator circuit that is programmable to provide multiple different levels of startup current. In the present embodiment, the crystal oscillator circuit includes logic devices for receiving programming indicating one of a plurality of different startup current levels and a resistor chain. The logic devices are coupled to the resistor chain for controlling the resistance of the oscillator circuit such that, upon receiving programming indicating a particular startup current level, the crystal oscillator circuit generates a corresponding startup current. In addition, the crystal oscillator circuit includes provision for selecting one of a plurality of different levels of capacitance. Furthermore, the crystal oscillator circuit includes a pass gate that includes circuitry for assuring predetermined startup conditions are met. A feedback loop that includes an amplifier provides for steady-state operations that have low power consumption.

Claims

1. A crystal oscillator circuit including:

a decoder for receiving programming indicating one of a plurality of different startup current levels; and

a resistor chain, said decoder coupled to said resistor chain for controlling a resistance of said crystal oscillator circuit, said crystal oscillator circuit operable, upon receiving said programming, to generate said one of said plurality of different startup current levels.

2. The crystal oscillator circuit of claim 1 further including a plurality of flip-flops, said decoder and said flip-flops adapted to control the startup current level.

3. The crystal oscillator circuit of claim 2 further comprising:

a first PMOS device, said first PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said first PMOS device, a current mirror is formed having a first resistivity;

a second PMOS device, said second PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said second PMOS device, a current mirror is formed having a second resistivity; and

a third PMOS device, said third PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said third PMOS device, a current mirror is formed having a third resistivity.

4. The crystal oscillator circuit of claim 3 wherein said resistor chain includes a first resistor and a second resistor, said first resistor disposed between a power source and said second resistor, said first PMOS device coupled to said resistor chain between said first resistor and said second resistor.

5. The crystal oscillator circuit of claim 4 wherein said resistor chain includes a third resistor that is coupled to said second resistor, said second PMOS device coupled to said resistor chain between said second resistor and said third resistor.

6. The crystal oscillator circuit of claim 5 wherein said first resistor has a resistance of approximately 0.423 k ohms, said second resistor has a resistance of approximately 0.634 k ohms, and said third resistor has a resistance of approximately 0.844 k ohms.

7. The crystal oscillator circuit of claim 1 wherein said circuit further includes provision for selecting one of a plurality of different levels of capacitance.

8. The crystal oscillator circuit of claim 7 further comprising a pass gate that includes circuitry for shorting a first node to a second node for assuring predetermined startup conditions are met.

9. The crystal oscillator circuit of claim 8 further comprising:

a crystal, said crystal oscillating in response to receiving an operating current comprising said one of said plurality of different startup current levels.

10. A microcontroller comprising:

a) provision for coupling an external crystal to said microcontroller;

b) a decoder for receiving programming indicating one of a plurality of different startup current levels; and

c) a crystal oscillator circuit coupled to said provision for coupling an external crystal to said microcontroller, said crystal oscillator circuit operable, upon receiving said programming, to generate said one of said plurality of different startup current levels.

11. The microcontroller of claim 10 wherein said circuit further includes:

c) provision for selecting one of a plurality of different levels of capacitance.

12. The microcontroller of claim 10 wherein said crystal oscillator circuit includes a resistor chain, said decoder coupled to said resistor chain for controlling a resistance of said crystal oscillator circuit.

13. The microcontroller of claim 12 further including a plurality of flip-flops, said decoder and said flip-flops adapted to control the startup current level in response to receiving said programming.

14. The microcontroller of claim 13 wherein said crystal oscillator circuit further comprises:

a first PMOS device, said first PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said first PMOS device, a current mirror is formed having a first resistivity;

a second PMOS device, said second PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said second PMOS device, a current mirror is formed having a second resistivity; and

a third PMOS device, said third PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said third PMOS device, a current mirror is formed having a third resistivity.

15. The microcontroller of claim 10 further comprising a pass gate that includes circuitry for shorting a first node to a second node for assuring predetermined startup conditions are met.

16. The microcontroller of claim 10 wherein said provision for coupling an external crystal to said microcontroller includes at least two contact pads, each of said at least two contact pads coupled to at least one switch for selectively disconnecting said at least two contact pads.

17. A microcontroller comprising:

a) a plurality of contact pads; and

b) a crystal oscillator circuit coupled to said plurality of contact pads, said crystal oscillator circuit including a decoder for receiving programming indicating one of a plurality of different startup current levels, said crystal oscillator circuit operable, upon receiving said programming, to generate said one of said plurality of different startup current levels.

18. The microcontroller of claim 17 wherein said crystal oscillator circuit further includes:

a plurality of flip-flops;

a resistor chain, said decoder coupled to said resistor chain for controlling a resistance of said crystal oscillator circuit, such that, upon receiving said programming, said crystal oscillator circuit generates said one of said plurality of different startup current levels; and

an amplifier coupled to said resistor chain so as to form a feedback loop.

19. The microcontroller of claim 18 wherein said crystal oscillator circuit further comprises:

a first PMOS device, said first PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said first PMOS device, a current mirror is formed having a first resistivity;

a second PMOS device, said second PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said second PMOS device, a current mirror is formed having a second resistivity; and

a third PMOS device, said third PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said third PMOS device, a current mirror is formed having a third resistivity.

20. The microcontroller of claim 19 further comprising a pass gate that includes circuitry for shorting a first node to a second node for assuring predetermined startup conditions are met.

21. An oscillator circuit including:

a decoder for receiving programming indicating one of a plurality of different startup current levels;

a resistor chain, said decoder coupled to said resistor chain for controlling a resistance of said oscillator circuit, said oscillator circuit operable, upon receiving said programming, to generate said one of said plurality of different startup current levels;

a plurality of flip-flops, said decoder and said flip-flops adapted to control the startup current level; and

provision for selecting one of a plurality of different levels of capacitance.

22. The oscillator circuit as described in claim 21 further comprising:

a first PMOS device, said first PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said first PMOS device, a current mirror is formed having a first resistivity;

a second PMOS device, said second PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said second PMOS device, a current mirror is formed having a second resistivity; and

a third PMOS device, said third PMOS device coupled to said decoder and coupled to said resistor chain such that, upon activation of said third PMOS device, a current mirror is formed having a third resistivity.

23. The oscillator circuit as described in claim 22 wherein said resistor chain includes a first resistor and a second resistor, said first resistor disposed between a main power source and said second resistor, said first PMOS device coupled to said resistor chain between said first resistor and said second resistor.

24. The oscillator circuit as described in claim 23 wherein said resistor chain further includes a third resistor that is coupled to said second resistor, said second PMOS device coupled to said resistor chain between said second resistor and said third resistor.