Method and apparatus for using programmable logic device (PLD) logic for decompression of configuration data

• US 6,563,437 B1
• Filed: 10/02/2000
• Issued: 05/13/2003
• Est. Priority Date: 10/02/2000
• Status: Expired due to Term

• Current Assignee: Monterey Research, LLC (Vector Capital Corporation)
• Original Assignee: Cypress Semiconductor Corporation (Infineon Technologies AG)
• Inventors: Landry, Greg J., Lacey, Timothy M.
• Primary Examiner(s): WAMSLEY, PATRICK G
• Application Number:
  US09/677,255
• Time in Patent Office: 953 Days
• Field of Search: 341/63, 341/67, 341/50, 341/51, 326/38, 710/74, 710/26, 713/193, 716/16, 257/679, 345/716, 345/543, 725/34, 358/1.2, 375/240.15, 382/233, 704/500, 708/402, 714/746
• US Class Current: 341/51
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

According to one embodiment, a method for programming a programmable logic device (PLD) may include reading configuration data from a memory device to program a first portion of a PLD to function as a data decompression circuit (304, 308). Compressed configuration data may then be read and decompressed by the first portion and used to program a second portion (310, 312, 315) with a user determined function. A first portion may then be reprogrammed with a user determined function (320, 324).

Claims

1. A method, comprising the steps of:

programming a first portion of programmable circuits to provide at least a first data decompression function; and

decompressing configuration data with the first portion to program a second portion of the programmable circuits.

2. The method of claim 1, further including:

reprogramming the first portion with configuration data.

3. The method of claim 2, wherein:

reprogramming the first portion includes reading uncompressed configuration data from a memory device.

4. The method of claim 2, wherein:

reprogramming the first portion includes reading compressed configuration data from a memory device, decompressing said configuration data with the first portion, and storing said decompressed configuration data.

5. The method of claim 1, wherein:

programming a first portion includes reading uncompressed configuration data from a memory device.

6. The method of claim 1, wherein:

decompressing configuration data includes reading compressed configuration data from a memory device.

7. The method of claim 1, wherein:

programming a first portion includes resetting the programmable circuits into at least one predetermined decompression function.

8. The method of claim 1, further including:

reprogramming a first portion to perform a second data decompression function that is different than the at least one first decompression function.

9. A method, comprising the steps of:

enabling one of a plurality of decompression functions on a programmable logic device (PLD) having programmable circuits; and

programming at least a portion of the programmable circuits according to configuration data decompressed on the PLD according to the enabled decompression function.

10. The method of claim 9, wherein:

enabling one of a plurality of decompression functions includes programming a first portion of the programmable circuits to perform at least one decompression function.

11. The method of claim 10, wherein:

enabling one of a plurality of decompression functions includes programming the first portion with decompressed configuration data read from a memory device; and

programming at least a portion of the PLD includes programming a second portion of the programmable circuits according to compressed data read from the memory device that is decompressed by the first portion.

12. The method of claim 11, further including:

reprogramming the first portion to perform a different function than the one decompression function.

13. The method of claim 10, wherein:

enabling one of a plurality of decompression functions include selecting one of a plurality of fixed decompression circuits formed on the PLD.

14. The method of claim 13, wherein:

selecting one of a plurality of fixed decompression circuits includes reading selection data from a memory device, and selecting the one fixed decompression circuit according to said selection data.

15. The method of claim 10, wherein:

the PLD and memory device are different integrated circuits.

16. The method of claim 10, wherein:

enabling one of a plurality of decompression functions includes resetting the programmable circuits to a reset state that includes at least the one decompression function.

17. A semiconductor device, comprising:

programmable circuits that may be configured by configuration data; and

fixed circuits formed in the same substrate as the programmable circuits, the fixed circuits providing one of a plurality of data decompression functions according to a select value.

18. The semiconductor device of claim 17, wherein:

the fixed circuits include a plurality of decompression circuits that each provide a different function, one of the fixed circuits being enabled according to the select value.

19. The semiconductor device of claim 17, wherein:

the fixed circuits include a plurality of decompression circuits that each provide a different function, access to one of the fixed circuits being enabled according to the select value.

20. The semiconductor device of claim 17, wherein:

the select value includes data r read from a memory device.