Method and apparatus for adapting the boost of a read channel filter

• US 6,563,889 B1
• Filed: 10/01/1998
• Issued: 05/13/2003
• Est. Priority Date: 10/01/1998
• Status: Expired due to Term

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: LSI Logic Corporation (Broadcom, Inc.)
• Inventors: Shih, Shih-Ming, Pan, Tzu-wang, Contreras, Richard A.
• Primary Examiner(s): Pham, Chi
• Assistant Examiner(s): Nguyen, Dung X.
• Application Number:
  US09/165,182
• Time in Patent Office: 1,685 Days
• Field of Search: 375/232, 375/233, 375/341, 375/261, 375/262, 375/263, 375/229, 375/350, 714/795, 369/59, 371/40.1, 371/41, 360/7, 360/53, 333/166, 333/28.R, 327/552, 327/561
• US Class Current: 375/341
• CPC Class Codes: G11B 20/10009 Improvement or modification of read or write signals
• CPC Class Codes: G11B 20/18 Error detection or correction; Testing , e.g. of drop-outs

Abstract

A system and method are disclosed for equalizing a read signal from a data storage media is disclosed. An analog output signal is equalized by reading the data storage media using an analog equalization filter. The analog output of the analog equalization filter is converted to a raw digital output signal. The raw digital output signal is processed to detect and correct an error in the raw digital output signal. The error is detected and an adjustment is made to the boost of the analog equalization filter according to the error detected.

Claims

1. A method of adaptively equalizing a read signal from a data storage media, comprising:

equalizing an analog output signal obtained by reading the data storage media using an analog equalization filter;

converting the analog output of the analog equalization filter to a raw digital output signal comprising a sequence of data points;

processing the raw digital output signal to detect and correct an error in the raw digital output signal;

determining a measure of the error detected; and

making an adjustment to the boost of the analog equalization filter according to the error detected from each data point of said sequence of data points, wherein the step of making the adjustment includes the step of multiplying said measure of the error detected from said each data point by a sum of a preceding point value corresponding to a preceding data point preceding said each data point and a succeeding point value corresponding to a succeeding data point succeeding said each data point.

2. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the error is detected using a Viterbi detector.

3. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the error detected is an rms error.

4. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the data storage media is a magnetic disk.

5. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the read signal is generated in a PRML system.

6. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the read signal is generated in an EPRML system.

7. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the analog equalization filter is a seventh order equiripple low pass filter.

8. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein making an adjustment to the boost of the analog equalization filter according to the error detected from said data point further includes multiplying said measure of the error detected by a factor that determines how much the boost of the analog equalization filter is adjusted.

9. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the sign of the adjustment made to the boost of the analog equalization filter is determined by the sign of the error detected.

10. A method of adaptively equalizing a read signal from a data storage media as recited in claim 1 wherein the sign of the adjustment made to the boost of the analog equalization filter is determined by the sign of the sum of the preceding point value and the succeeding point value.

22. A method of adaptively equalizing a read signal from a data storage media as recited in claim 8 wherein making an adjustment to the boost of the analog equalization filter according to the error detected from each data point further includes making the adjustment according to the equation b₂(n+1)=b₂(n)+μ

(Sign[e(n)]·

[x(n−

1)+x(n+1)]), where b₂ is a boost adjustment value, n is a particular data point of the sequence of data points, μ

is a selectable boost amount constant, e is an error signal, x is an ideal output signal of equalizing, and y is an actual output signal generated by equalizing.

11. A system for adaptively equalizing a read signal from a data storage media, comprising:

an adaptive analog equalization filter having an adjustable boost;

an analog to digital converter that converts the output of the adaptive analog equalization filter to a raw digital signal comprising a sequence of data points;

a Viterbi detector for detecting errors in the sequence of data points of the raw digital signal, the Viterbi detector having an output that outputs a corrected signal; and

an adaptation processor that compares the raw digital signal to the corrected signal that is output from the Viterbi detector an generates a boost adjustment signal that is input to the adaptive analog equalization filter;

whereby the adaptive analog equalization filter is adjusted by multiplying a measure of the errors detected from each data point of said sequence of data points by a sum of a preceding point value corresponding to a preceding data point preceding said each data point and a succeeding point value corresponding to a succeeding data point succeeding said each data point to minimize the errors detected by the Viterbi detector.

12. A system for adaptively equalizing an analog read signal from a data storage media, including:

an equalizer configured for filtering the analog read signal;

an analog to digital converter communicatively connected to the equalizer for converting the analog read signal into a digital read signal comprising a sequence of data points; and

a processor communicatively connected to the analog to digital converter for detecting errors in the sequence of data points of the digital read signal and providing a feedback signal to adjust the equalizer and adaptively minimize the errors, the feedback signal including a boost adjustment to the equalizer formed by multiplying a measure of the errors detected from each data point of said sequence of data points by a sum of a preceding point value corresponding to a preceding data point preceding said each data point and a succeeding point value corresponding to a succeeding data point succeeding said each data point.

13. The system of claim 12, wherein the processor includes:

a Viterbi detector communicatively connected to the analog to digital converter for detecting the errors of the digital read signal to generate a corrected signal, and a comparator communicatively connected to the Viterbi detector for comparing the digital read signal to the corrected signal to generate the feedback signal.

14. The system of claim 12, wherein the data storage media includes a magnetic disk.

15. The system of claim 12, further including a signal generator communicatively connected to the equalizer for generating the analog read signal, the signal generator including a PRML component.

16. The system of claim 12, further including a signal generator communicatively connected to the equalizer for generating the analog read signal, the signal generator including an EPRML component.

17. The system of claim 12, wherein the equalizer includes a low pass filter.

23. The system of claim 13, wherein the boost adjustment is formed according to the equation b₂(n+1)=b₂(n)+μ

(Sign[e(n)]·

[x(n−

1)+x(n+1)]), where b₂ is a boost adjustment value, n is a particular data point of the sequence of data points, μ

is a selectable boost amount constant, e is an error signal, x is an ideal output signal of the equalizer, and y is an actual output signal of the equalizer.

18. A system for adaptively equalizing an analog signal, including:

an equalizer configured for filtering the analog signal;

an analog to digital converter communicatively connected to the equalizer for converting the analog signal into a digital signal comprising a sequence of data points with a run length limited code of d equal to zero or greater, where d is a run length condition; and

a processor communicatively connected to the analog to digital converter for detecting errors in the sequence of data points of the digital signal and providing a feedback signal to adjust the equalizer and adaptively minimize the errors.

19. The system of claim 18, wherein the processor includes:

a Viterbi detector communicatively connected to the analog to digital converter for detecting the errors of the digital signal to generate a corrected signal; and

a comparator communicatively connected to the Viterbi detector for comparing the digital signal to the corrected signal to generate the feedback signal, the feedback signal including a boost adjustment to the equalizer formed by multiplying a measure of the errors detected from each data point of said sequence of data points by a sum of a preceding point value corresponding to a preceding data point preceding said each data point and a succeeding point value corresponding to a succeeding data point succeeding said each data point.

20. The system of claim 19, wherein the boost adjustment is formed according to the equation b₂(n+1)=b₂(n)+μ

(Sign[e(n)]·

[x(n−

1)+x(n+1)]), where b₂ is a boost adjustment value, n is a particular data point of the sequence of data points, μ

is a selectable boost amount constant, e is an error signal, x is an ideal output signal of the equalizer, and y is an actual output signal of the equalizer.

21. The system of claim 18, wherein the equalizer includes a low pass filter.