Resin structure in which manufacturing cost is cheap and sufficient adhesive strength can be obtained and method of manufacturing it

• US 6,564,448 B1
• Filed: 04/20/2000
• Issued: 05/20/2003
• Est. Priority Date: 05/08/1998
• Status: Expired due to Fees

• Current Assignee: NEC Electronics Corporation (Renesas Electronics Corporation)
• Original Assignee: NEC Corporation
• Inventors: Fujii, Kenzo, Oura, Kikuo
• Primary Examiner(s): Arbes, Carl J.
• Application Number:
  US09/553,864
• Time in Patent Office: 1,125 Days
• Field of Search: 216/20, 298/30, 298/52, 427/96, 427/97
• US Class Current: 29/830
• CPC Class Codes: C23C 18/1608 from pretreatment step, i.e. selective pre-treatment
• CPC Class Codes: C23C 18/1651 Two or more layers only obtained by electroless plating
• CPC Class Codes: C23C 18/1658 with two steps starting with metal deposition followed by addition of reducing agent
• CPC Class Codes: C23C 18/166 with two steps starting with addition of reducing agent followed by metal deposition
• CPC Class Codes: C23C 18/2013 by mechanical pretreatment, e.g. grinding, sanding
• CPC Class Codes: C23C 18/22 Roughening, e.g. by etching
• CPC Class Codes: C23C 18/285 Sensitising or activating with tin based compound or composition
• CPC Class Codes: C23C 18/30 Activating or accelerating or sensitising with palladium or other noble metal
• CPC Class Codes: C23C 18/40 using reducing agents
• CPC Class Codes: C25D 5/56 of plastics
• CPC Class Codes: H01L 2924/15151 the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H05K 3/381 by special treatment of the substrate
• CPC Class Codes: Y10T 29/49126 Assembling bases
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49155 Manufacturing circuit on or in base
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A resin structure includes a resin layer and a metal layer. The resin layer is formed of a single material. The metal layer is laminated directly on the resin layer without intervention of an adhesive layer between the resin layer and the metal layer. A surface of the resin layer, on which the metal layer is laminated, has a surface roughness of a value in a range of 0.1 microns to 10 microns, as a rough surface. The metal layer is formed on the rough surface of the resin layer.

Claims

1. A method of manufacturing a build-up multiple-layer circuit board, comprising:

providing a core board;

providing an insulating layer formed of resin material;

forming at least one of a via-hole and a through-hole in said insulating layer;

making at least a portion of an inner surface of said at least one of a via-hole hole and said through-hole rough such that a surface roughness of said inner surface is in a range of 0.1 microns to 10 microns;

laminating said insulating layer of said core board; and

forming an electronic circuit on said rough surface of said resin substrate; and

forming a metal layer on said rough inner surface of said at least one of a via-hole hole and said through-hole.

2. The method of claim 1, wherein said making an inner surface of said at least one of a via-hole hole and said through-hole rough such that a surface roughness of said inner surface is in a range of 0.1 microns to 10 microns is performed using wet blasting on at least one surface of said at least one of a via-hole hole and said through-hole.

3. The method of claim 2, wherein said wet blasting further comprises a plurality of non-spherical particles having from between a 5 to 40 volume percentage in a liquid medium sprayed on said surface at a pressure of between 1 to 6 Kg per square centimeter of surface.

4. The method of claim 2, wherein said forming a metal layer on said rough inner surface of said at least one of a via-hole hole and said through-hole is performed by an electroless plating with a selected non-formalin reducing plating solution without an adhesive layer between said rough inner surface and said metal layer.

5. A method of manufacturing a multiple-layer circuit board, comprising the steps of:

forming a core board including a first insulating layer formed of resin material;

forming a first plurality of contact holes in the first insulating layer;

roughening at least a portion of an inner surface of the first plurality of contact holes and at least a portion of a surface of the first insulating layer such that a roughness is in a range of 0.1 microns to 10 microns from peak to valley;

forming a first metal layer on the inner surface of the first plurality of contact holes and the first insulating layer;

forming an electronic circuit pattern in the first metal layer;

forming a second insulating layer formed of resin material on the first metal;

forming a second plurality of contact holes in the second insulating layer;

roughening at least a portion of an inner surface of the second plurality of contact holes and at least a portion of a surface of the second insulating layer such that a roughness is in a range of 0.1 microns to 10 microns from peak to valley;

forming a second metal layer on the inner surface of the second plurality of contact holes and the second insulating layer;

forming an electronic circuit pattern in the second metal layer; and

repeating the method for each additional layer of the multiple layered circuit board and sealing with seal resin an uppermost rough surface of the insulating layer on which the electronic circuit pattern is formed in the uppermost metal layer.