Deposition of conformal copper seed layers by control of barrier layer morphology

• US 6,566,246 B1
• Filed: 05/21/2001
• Issued: 05/20/2003
• Est. Priority Date: 05/21/2001
• Status: Active Grant

• Current Assignee: Novellus Systems Incorporated (LAM Research Corporation)
• Original Assignee: Novellus Systems Incorporated (LAM Research Corporation)
• Inventors: Dulkin, Alexander, Danek, Michal, Klawuhn, Erich, de Felipe, Tarek Suwwan
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Nhu, David
• Application Number:
  US09/862,539
• Time in Patent Office: 729 Days
• Field of Search: 438/627, 438/643, 438/653, 438/680, 438/681, 438/687, 438/700, 438/706
• US Class Current: 438/627
• CPC Class Codes: H01L 21/2855 by physical means, e.g. sputtering, evaporation H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/28556 by chemical means, e.g. CVD, LPCVD, PECVD, laser CVD H01L21/28518 - H01L21/28537 and H01L21/28568 take precedence
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76846 Layer combinations
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 2221/1089 Stacks of seed layers

Abstract

The present invention pertains to systems and methods for improving the deposition of conformal copper seed layers in integrated circuit metalization. The invention involves controlling the morphology of the barrier layer deposited underneath the copper seed layer. The barrier layer can be composed of TaN and Ta, or TaN alone. It can also be composed of TiN or TiNSi. The process conditions of the barrier layer deposition are carried out in a manner that results in a highly or completely amorphous crystalline structure. Such a barrier layer allows for conformal deposition of the copper seed layer on top of the barrier layer that is less susceptible to agglomeration.

Claims

1. A method of forming a barrier layer comprising tantalum nitride by physical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

sputtering a target comprising tantalum; and

introducing a nitrogen source in an amount so that the surface of the barrier layer displays a randomness of at least about 50%.

2. The method of claim 1 wherein the randomness is about 50 to 70%.

3. The method of claim 1 wherein the nitrogen source is N₂ gas.

4. The method of claim 1 wherein the nitrogen source is N₂ gas and the N₂ gas is introduced at a rate of about 10 to 110 SCCM.

5. The method of claim 1 wherein the nitrogen source is N₂ gas and the N₂ gas is introduced at a rate of about 30 to 40 SCCM.

6. The method of claim 1 wherein the method is carried at about 2 to 8 millitorr.

7. The method of claim 1 wherein the method is carried out at about 20 to 80°

C.

8. The method of claim 1 wherein the barrier layer is formed at a rate of about 1 to 15 Å

per second.

9. The method of claim 1 wherein the barrier layer is formed at a rate of about 12 Å

per second.

10. The method of claim 1 wherein about 25 to 100 Å

of barrier layer is formed at the bottom of a feature.

11. The method of claim 1 wherein about 50 Å

of barrier layer is formed at the bottom of a feature of the semiconductor substrate.

12. A method of forming a barrier layer comprising tantalum and tantalum nitride, by physical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

sputtering a target comprising tantalum to deposit tantalum; and

sputtering a target comprising tantalum and introducing a nitrogen source to deposit tantalum nitride at the surface of the barrier layer, the nitrogen source being introduced in an amount so that the surface displays a randomness of at least about 50%.

13. The method of claim 12 wherein the randomness is about 50 to 70%.

14. The method of claim 12 wherein the nitrogen source is N₂ gas.

15. The method of claim 12 wherein the nitrogen source is N₂ gas and the N₂ gas is introduced at a rate of about 10 to 110 SCCM.

16. The method of claim 12 wherein the nitrogen source is N₂ gas and the N₂ gas is introduced at a rate of about 30 to 40 SCCM.

17. The method of claim 12 wherein the method is carried out at about 2 to 8 millitorr.

18. The method of claim 12 wherein the method is carried out at about 20 to 80°

C.

19. The method of claim 12 wherein the barrier layer is formed at a rate of about 1 to 15 Å

per second.

20. The method of claim 12 wherein the barrier layer is formed at a rate of about 12 Å

per second.

21. The method of claim 12 wherein about 25 to 100 Å

of tantalum nitride is formed at the bottom of a feature of the semiconductor substrate.

22. The method of claim 12 wherein about 50 Å

of tantalum nitride is formed at the bottom of a feature of the semiconductor substrate.

23. The method of claim 12 wherein about 10 Å

of tantalum nitride is formed at the bottom of a feature of the semiconductor substrate.

24. The method of claim 12 wherein about 25 to 150 Å

of tantalum is formed at the bottom of a feature of the semiconductor substrate.

25. The method of claim 12 wherein about 100 Å

of tantalum is formed at the bottom of a feature of the semiconductor substrate.

26. The method of claim 12 wherein about 50 Å

of tantalum is formed at the bottom of a feature of the semiconductor substrate.

27. A method of forming a barrier layer comprising tantalum and tantalum nitride, by physical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

sputtering a target comprising tantalum and introducing a nitrogen source to deposit tantalum nitride in a bottom layer;

sputtering a target comprising tantalum to deposit tantalum in a middle layer; and

sputtering a target comprising tantalum and introducing a nitrogen source to deposit tantalum nitride in a top layer at the surface of the barrier layer, the nitrogen source being introduced in an amount so that the surface displays a randomness of at least about 50%.

28. The method of claim 27 wherein the randomness is about 50 to 70%.

29. The method of claim 27 wherein the nitrogen source is N₂ gas.

30. The method of claim 27 wherein the nitrogen source is N₂ gas and the N₂ gas is introduced at a rate of about 10 to 110 SCCM.

31. The method of claim 27 wherein the nitrogen source is N₂ gas and the N₂ gas is introduced at a rate of about 30 to 40 SCCM.

32. The method of claim 27 wherein the method is carried out at about 2 to 8 millitorr.

33. The method of claim 27 wherein the method is carried out at about 20 to 80°

C.

34. The method of claim 27 wherein the barrier layer is formed at a rate of about 1 to 15 Å

per second.

35. The method of claim 27 wherein the barrier layer is formed at a rate of about 12 Å

per second.

36. The method of claim 27 wherein about 25 to 100 Å

of tantalum nitride is formed at the bottom of a feature of the semiconductor substrate.

37. The method of claim 27 wherein about 50 Å

of tantalum nitride is formed at the bottom of a feature of the semiconductor substrate.

38. The method of claim 27 wherein about 10 Å

of tantalum nitride is formed at the bottom of a feature of the semiconductor substrate.

39. The method of claim 27 wherein about 25 to 150 Å

of top-layer tantalum is formed at the bottom of a feature of the semiconductor substrate.

40. The method of claim 27 wherein about 100 Å

of top-layer tantalum is formed at the bottom of a feature of the semiconductor substrate.

41. The method of claim 27 wherein about 50 Å

of top-layer tantalum is formed at the bottom of a feature of the semiconductor substrate.

42. The method of claim 27 wherein about 25 to 150 Å

of bottom-layer tantalum is formed at the bottom of a feature of the semiconductor substrate.

43. The method of claim 27 wherein about 100 Å

of bottom-layer tantalum is formed at the bottom of a feature of the semiconductor substrate.

44. The method of claim 27 wherein about 50 Å

of bottom-layer tantalum is formed at the bottom of a feature of the semiconductor substrate.

45. A method of forming a barrier layer comprising titanium nitride by chemical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

introducing a titanium-containing precursor and a nitrogen source into a chamber, nitrogen source being introduced in an amount so that the surface displays a randomness of at least about 50%.

46. The method of claim 45 wherein the randomness is about 50 to 100%.

47. The method of claim 45 wherein the titanium-containing precursor is TDEAT.

48. The method of claim 45 wherein and the nitrogen source is NH₃.

49. The method of claim 45 wherein the method is carried out at about 25 to 100 torr.

50. The method of claim 45 wherein the method is carried out at about 60 torr.

51. The method of claim 45 wherein the method is carried out at about 200 to 500°

C.

52. The method of claim 45 wherein the NH₃ flow is about 3 to 8 liters gas per minute.

53. The method of claim 45 wherein the TDEAT flow is about 0.02 to 0.20 mg liquid per minute.

54. The method of claim 45 wherein the NH₃ flow is about 6 liters gas per minute.

55. The method of claim 45 wherein the TDEAT flow is about 0.11 milligrams liquid per minute.

56. The method of claim 45 wherein the titanium nitride is formed at a rate of about 1 to 10 Å

per second.

57. The method of claim 45 wherein the titanium nitride is formed at a rate of about 4 Å

per second.

58. The method of claim 45 wherein about 25 to 100 Å

of barrier layer is formed at the bottom of a feature of the semiconductor substrate.

59. The method of claim 45 wherein about 50 Å

of barrier layer is formed at the bottom of a feature of the semiconductor substrate.

60. The method of claim 45 wherein about 10 Å

of barrier layer is formed at the bottom of a feature of the semiconductor substrate.

61. A method of forming a barrier layer comprising tantalum nitride by physical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

sputtering a target comprising tantalum; and

introducing a nitrogen source in an amount so that the surface of the barrier layer displays a randomness of at least about 50%,

wherein the method is carried at about 2 to 8 millitorr.

62. A method of forming a barrier layer comprising tantalum and tantalum nitride, by physical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

sputtering a target comprising tantalum to deposit tantalum; and

sputtering a target comprising tantalum and introducing a nitrogen source to deposit tantalum nitride at the surface of the barrier layer, the nitrogen source being introduced in an amount so that the surface displays a randomness of at least about 50%,

wherein the method is carried out at about 2 to 8 millitorr.

63. A method of forming a barrier layer comprising titanium nitride by chemical vapor deposition on a semiconductor substrate, such that the barrier layer reduces agglomeration and notching of a copper seed layer formed on top of the barrier layer, the method comprising:

introducing a titanium-containing precursor and a nitrogen source into a chamber, nitrogen source being introduced in an amount so that the surface displays a randomness of at least about 50%,

wherein between about 10 to 100 Å

of barrier layer is formed at the bottom of a feature of the semiconductor substrate.