Method of forming an HDP CVD oxide layer over a metal line structure for high aspect ratio design rule

• US 6,566,263 B1
• Filed: 08/02/2000
• Issued: 05/20/2003
• Est. Priority Date: 08/02/2000
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Ger, Teh-Wei, Hung, Mong-Chi, Wang, Ming-Tsong
• Primary Examiner(s): NGUYEN, HA T
• Application Number:
  US09/630,452
• Time in Patent Office: 1,021 Days
• Field of Search: 438/618, 438/627, 438/636, 438/628, 438/643, 438/644, 438/653, 438/654, 438/688, 438/770, 438/759, 438/778, 438/787
• US Class Current: 438/688
• CPC Class Codes: H01L 21/02112 characterised by the material of the layer
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02304 formation of intermediate layers, e.g. buffer layers, layers to improve adhesion, lattice match or diffusion barriers
• CPC Class Codes: H01L 21/02315 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 21/31683 of metallic layers, e.g. Al deposited on the body, e.g. formation of multi-layer insulating structures
• CPC Class Codes: H01L 21/76834 formation of thin insulating films on the sidewalls or on top of conductors H01L21/76831 takes precedence
• CPC Class Codes: H01L 21/76837 Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
• CPC Class Codes: H01L 21/76888 By rendering at least a portion of the conductor non conductive, e.g. oxidation

Abstract

A method of forming an HDP CVD oxide layer over a metal line structure, comprising the following steps. A semiconductor structure having metal lines formed thereon to form a metal line structure is provided. The metal lines having exposed sidewalls. The metal line structure is treated with N₂O to form a layer of Al₂O₃ on each of the metal line exposed sidewalls to form a N₂O treated metal line structure. An HDP CVD oxide layer is formed over the N₂O treated metal line structure to form a resulting metal line structure. Whereby the resulting metal line structure is free of metal voids.

Claims

1. A method of forming an HDP CVD oxide layer over a metal line structure, comprising the steps of:

providing a semiconductor structure having metal lines formed thereon to form a metal line structure;

each of said metal lines having exposed metal sidewalls;

forming a layer of aluminum oxide directly on each of said metal line exposed metal sidewalls by treating said metal line structure with N₂O, resulting in an N₂O treated metal line structure; and

forming an HDP CVD oxide layer upon said N₂O treated metal line structure to form a resulting metal line structure;

whereby said resulting metal line structure is free of metal voids.

2. The method of claim 1, wherein said N₂O treatment is conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 800 to 1600 sccm, at a temperature from about 360 to 440°

C., and for from about 40 to 90 seconds.

3. The method of claim 1, wherein said N₂O treatment is conducted at an RF bias of about 200 W, at an N₂O flow of about 1400 sccm, and at a temperature of about 400°

C., for about 45 seconds.

4. The method of claim 1, wherein said N₂O treatment is conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 900 to 1400 sccm, at a temperature from about 380 to 400°

C., for from about 40 to 90 seconds using an AMAT tool.

5. The method of claim 1, wherein said N₂O treatment is conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 1000 to 1200 sccm, at a temperature from about 385 to 395°

C., for from about 40 to 90 seconds using a Novellus tool.

6. The method of claim 1, wherein each of said Al₂O₃ layer is from about 50 to 300 Å

thick.

7. The method of claim 1, wherein each of said Al₂O₃ layers is about 150 Å

thick.

8. The method of claim 1, wherein said HDP CVD oxide layer is formed by a tool selected from the group comprising an AMAT HDP tool and a Novellus HDP tool.

9. The method of claim 1, wherein said HDP CVD oxide layer is formed by a process selected from the group comprising an AMAT HDP process and a Novellus HDP process.

10. The method of claim 1, further including an TiN glue layer joining each metal line to said semiconductor substrate, and a TiN ARC over each said metal line.

11. The method of claim 1, further including a Ti rich TiN glue layer joining each metal line to said semiconductor substrate, said Ti rich TiN glue layer having a thickness from about 130 to 170 Å

; and

a TiN ARC over each said metal line, said TiN ARC having a thickness from about 500 to 600 Å

.

12. The method of claim 1, further including a Ti rich TiN glue layer joining each metal line to said semiconductor substrate, said Ti rich TiN glue layer having a thickness of about 150 Å

; and

a TiN ARC over each said metal line, said TiN ARC having a thickness o f about 550 Å

.

13. The method of claim 1, wherein said metal line structure has a metal density of less than 35%.

14. The method of claim 1, wherein said metal line structure has a metal density of greater than 35%.

15. The method of claim 1, wherein said metal lines are comprised of Al, an AlSiCu alloy, or an AlCu(0.5% wt.) alloy.

16. The method of claim 1, wherein said metal lines are comprised of an AlCu(0.5% wt.) alloy.

17. The method of claim 1, wherein the metal line structure has a design rule down to 0.25 μ

m.

18. The method of claim 1, wherein the metal line structure has a design rule down to 0.15 μ

m.

19. A method of forming an HDP CVD oxide layer over a metal line structure, comprising the steps of:

providing a semiconductor structure having metal lines formed thereon to form a metal line structure;

each of said metal lines having exposed metal sidewalls;

treating said metal line structure with N₂O directly contacting said exposed metal sidewalls to form an N₂O treated metal line structure having an oxide layer of said metal said N₂O treatment being conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 800 to 1600 sccm, at a temperature from about 380 to 440°

C., for from about 40 to 90 seconds; and

forming an HDP CVD oxide layer upon said N₂O treated metal line structure to form a resulting metal line structure;

the HDP CVD oxide layer being an interlevel dielectric layer;

whereby said resulting metal line structure is free of metal voids.

20. The method of claim 19, wherein said N₂O treatment is conducted at an RF bias of about 200 W, at an N₂O flow of about 1400 sccm, and at a temperature of about 400°

C., for about 45 seconds.

21. The method of claim 19, wherein said N₂O treatment is conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 900 to 1400 sccm, at a temperature from about 390 to 420°

C., for from about 40 to 90 seconds using an AMAT tool.

22. The method of claim 19, wherein said N₂O treatment is conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 1000 to 1200 sccm, at a temperature from about 385 to 395°

C., for from about 40 to 50 seconds using a Novellus tool.

23. The method of claim 19, wherein each of said Al₂O₃ layer is from about 50 to 300 Å

thick.

24. The method of claim 19, wherein each of said Al₂O₃ layers is about 150 Å

thick.

25. The method of claim 19, wherein said HDP CVD oxide layer is formed by a tool selected from the group comprising an AMAT HDP tool and a Novellus HDP tool.

26. The method of claim 19, wherein said HDP CVD oxide layer is formed by a process selected from the group comprising an AMAT HDP process and a Novellus HDP process.

27. The method of claim 19, further including a Ti rich TiN glue layer joining each metal line to said semiconductor substrate, and a TiN ARC over each said metal line.

28. The method of claim 19, further including a Ti rich TiN glue layer joining each metal line to said semiconductor substrate, said Ti rich TiN glue layer having a thickness from about 130 to 170 Å

; and

a TiN ARC over each said metal line, said TiN ARC having a thickness from about 500 to 600 Å

.

29. The method of claim 19, further including a Ti rich TiN glue layer joining each metal line to said semiconductor substrate, said Ti rich TiN glue layer having a thickness of about 150 Å

; and

a TiN ARC over each said metal line, said TiN ARC having a thickness of about 550 Å

.

30. The method of claim 19, wherein said metal line structure has a metal density of less than 35%.

31. The method of claim 19, wherein said metal line structure has a metal density of greater than 35%.

32. The method of claim 19, wherein said metal lines are comprised of Al, an AlSiCu alloy, or an AlCu (0.5% wt.) alloy.

33. The method of claim 19, wherein said metal lines are comprised of an AlCu (0.5% wt.) alloy.

34. The method of claim 19, wherein the metal line structure has a design rule down to 0.25 μ

m.

35. The method of claim 19, wherein the metal line structure has a design rule down to 0.15 μ

m.

36. A method of forming an HDP CVD oxide interlevel dielectric layer over a metal line structure using an AMAT HDP process, the metal line structure having exposed metal, the improvement comprising:

pre-treating said metal line structure before said AMAT HDP process with an N₂O process conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 800 to 1600 sccm, at a temperature from about 360 to 440°

C., and for from about 40 to 90 seconds;

wherein N₂O contacts directly said exposed metal to form an oxide layer of said metal.

37. The method of claim 36, wherein said N₂O process is conducted at an RF bias of about 200 W, at an N₂O flow of about 1400 sccm, and at a temperature of about 400°

C., for about 45 seconds.

38. A method of forming an HDP CVD oxide layer over a metal line structure using a Novellus HDP process, the improvement comprising:

pre-treating said metal line structure before said Novellus HDP process with an N₂O process conducted at an RF bias of from about 180 to 220 W, at an N₂O flow of from about 800 to 1600 sccm, at a temperature from about 360 to 440°

C., and for from about 40 to 90 seconds;

wherein N₂O contacts directly said exposed metal to form an oxide layer of said metal.

39. The method of claim 38, wherein said N₂O process is conducted at an RF bias of about 200 W, at an N₂O flow of about 1400 sccm, and at a temperature of about 400°

C., for about 45 seconds.