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Semiconductor device with trench gate having structure to promote conductivity modulation

  • US 6,566,691 B1
  • Filed: 09/29/2000
  • Issued: 05/20/2003
  • Est. Priority Date: 09/30/1999
  • Status: Expired due to Term
First Claim
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1. A semiconductor device with a trench gate, comprising:

  • a first semiconductor layer of first conductivity type;

    second semiconductor layer of second conductivity type, which is arranged on the first semiconductor layer, to inject carriers of second conductivity type into the first semiconductor layer;

    a third semiconductor layer of second conductivity type, which is arranged on the first semiconductor layer, to collect the carriers of second conductivity type in the first semiconductor layer from the first semiconductor layer;

    a pair of trench portions extending through the third semiconductor layer and reaching the first semiconductor layer;

    a pair of gate electrode portions disposed in the pair of trench portions via gate insulating films, respectively;

    a pair of fourth semiconductor layer portions of first conductivity type, which are formed along the pair of trench portions, respectively, in a surface portion of the third semiconductor layer which is not interposed between the pair of trench portions, each of the fourth semiconductor layer portions being arranged to inject carriers of first conductivity type through a channel induced in the third semiconductor layer by the gate electrode portion into the first semiconductor layer and cause conductivity modulation therein;

    a first main electrode disposed in contact with the second semiconductor layer;

    a second main electrode disposed in contact with the third semiconductor layer and fourth semiconductor layer portions;

    an isolation insulating layer formed between the pair of trench portions to completely insulate and isolate, from the first semiconductor layer, a semiconductor layer in a non-current path region interposed between the pair of trench portions; and

    an additional electrode in contact with the semiconductor layer in the non-current path region, the additional electrode being electrically connected to the second main electrode.

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