Semiconductor device having interlayer insulating film
First Claim
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1. An active matrix display device having at least one thin film transistor comprising:
- a semiconductor layer formed over a substrate having an insulating surface;
a first pair of impurity regions formed in said semiconductor layer wherein said first pair of impurity regions include an impurity having one conductivity type at a first concentration;
a channel region formed in said semiconductor layer between said pair of impurity regions;
a second pair of impurity regions formed between said first pair of impurity regions and said channel region wherein said second pair of impurity regions include said impurity having said conductivity type at a second concentration lower than said first concentration;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film formed over said semiconductor layer;
an organic resin film formed over said interlayer insulating film, said organic resin film having a leveled upper surface; and
a pixel electrode formed over said organic resin film and electrically connected to said semiconductor layer.
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Abstract
An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
234 Citations
123 Claims
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1. An active matrix display device having at least one thin film transistor comprising:
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a semiconductor layer formed over a substrate having an insulating surface;
a first pair of impurity regions formed in said semiconductor layer wherein said first pair of impurity regions include an impurity having one conductivity type at a first concentration;
a channel region formed in said semiconductor layer between said pair of impurity regions;
a second pair of impurity regions formed between said first pair of impurity regions and said channel region wherein said second pair of impurity regions include said impurity having said conductivity type at a second concentration lower than said first concentration;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film formed over said semiconductor layer;
an organic resin film formed over said interlayer insulating film, said organic resin film having a leveled upper surface; and
a pixel electrode formed over said organic resin film and electrically connected to said semiconductor layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 56, 114)
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10. An active matrix device having a thin film transistor, comprising:
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a semiconductor island comprising silicon formed over a substrate;
a channel region in said semiconductor island;
source and drain regions with said channel region interposed therebetween;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions of said thin film transistor through a first contact hole of said interlayer insulating film;
a planarizing film comprising an organic resin formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer through a second contact hole of said planarizing film, wherein said second contact hole does not overlap said first contact hole. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 25, 28, 57, 108, 115)
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20. An active matrix device having a thin film transistor, comprising:
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a semiconductor island comprising silicon formed over a substrate;
a channel region in said semiconductor island;
source and drain regions with said channel region interposed therebetween; and
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions of said thin film transistor through a first contact hole of said interlayer insulating film;
a planarizing film comprising an organic resin formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer through a second contact hole of said planarizing film, wherein said conductive layer has an extended portion which extends from said first contact hole and said pixel electrode contacts said extended portion. - View Dependent Claims (21, 22, 23, 24, 26, 27, 29, 58, 109, 116)
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30. A semiconductor device having at least one thin film transistor comprising:
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a semiconductor layer formed over a substrate having an insulating surface, said semiconductor layer comprising source and drain regions including an impurity having one conductivity type at a first concentration, a channel region formed between said source and drain regions, and at least one lightly doped drain region formed between one of said source and drain regions and said channel region, wherein said lightly doped drain region includes said impurity at a second concentration lower than said first concentration;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
a first interlayer insulating film formed over said semiconductor layer and said gate electrode;
a second interlayer insulating film formed over said first interlayer insulating film, said second interlayer insulating film having a leveled upper surface; and
a pixel electrode formed on said leveled upper surface of said second interlayer insulating film. - View Dependent Claims (31, 32, 33, 34, 35, 36, 37, 59, 117)
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38. An active matrix device having a thin film transistor formed over an substrate, comprising:
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a semiconductor island formed over a substrate having an insulating surface, said semiconductor island comprising silicon, said semiconductor island having a at least channel, source, and drain regions;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions through a first contact hole of said interlayer insulating film;
a planarizing film formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer through a second contact hole of said planarizing film, wherein said second contact hole does not overlap said first contact hole. - View Dependent Claims (39, 40, 41, 42, 43, 44, 45, 46, 47, 60, 110, 118)
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48. An active matrix device having a thin film transistor formed over a substrate, comprising:
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a semiconductor island comprising silicon formed over a substrate having an insulating surface, said semiconductor island having at least channel, source, and drain regions; and
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source or drain regions through a first contact hole of said interlayer insulating film;
a planarizing film formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer through a second contact hole of said planarizing film, wherein said conductive layer has an extended portion which extends from said first contact hole and said pixel electrode contacts said extended portion. - View Dependent Claims (49, 50, 51, 52, 53, 54, 55, 61, 111, 119)
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62. An active matrix device having a thin film transistor, comprising:
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a semiconductor layer formed over a substrate having an insulating surface, said semiconductor layer comprising source and drain regions including an impurity having one conductivity type at a first concentration, a channel region formed between said source and drain regions, and at least one lightly doped drain region formed between one of said source and drain regions and said channel region, wherein said lightly doped drain region includes said impurity at a second concentration lower than said first concentration;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions of said thin film transistor;
a planarizing film comprising an organic resin formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer. - View Dependent Claims (63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 120)
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73. An electric device having an active matrix display device comprising:
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a semiconductor island comprising silicon formed over a substrate having an insulating surface, said semiconductor island having a at least channel, source, and drain regions;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions through a first contact hole of said interlayer insulating film;
a planarizing film formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer through a second contact hole of said planarizing film, wherein said second contact hole does not overlap said first contact hole. - View Dependent Claims (74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 112, 121)
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85. An electric device having an active matrix display device comprising:
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a semiconductor layer formed over a substrate having an insulating surface, said semiconductor layer comprising source and drain regions including an impurity having one conductivity type at a first concentration, a channel region formed between said source and drain regions, and at least one lightly doped drain region formed between one of said source and drain regions and said channel region, wherein said lightly doped drain region includes said impurity at a second concentration lower than said first concentration;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and said gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions;
a planarizing film comprising an organic resin formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer. - View Dependent Claims (86, 87, 88, 89, 91, 92, 93, 94, 95, 113, 122)
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96. An electric device having an active matrix display comprising:
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a semiconductor layer formed over a substrate having an insulating surface, said semiconductor layer comprising source and drain regions including an impurity having one conductivity type at a first concentration, a channel region formed between said source and drain regions, and at least one lightly doped drain region formed between one of said source and drain regions and said channel region, wherein said lightly doped drain region includes said impurity at a second concentration lower than said first concentration;
a gate electrode adjacent to said channel region with a gate insulating film interposed therebetween;
an interlayer insulating film covering said semiconductor island and gate electrode;
a conductive layer formed on said interlayer insulating film and connected to one of the source and drain regions;
a planarizing film comprising an organic resin formed over said interlayer insulating film and said conductive layer; and
a pixel electrode formed over said planarizing film and connected to said conductive layer. - View Dependent Claims (90, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 123)
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Specification