Cascode regulator with plural outputs

• US 6,566,846 B1
• Filed: 04/29/2002
• Issued: 05/20/2003
• Est. Priority Date: 11/10/2000
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: Marvell International Limited (Marvell Technology Group Limited)
• Inventors: Voo, Thart Fah
• Primary Examiner(s): Riley, Shawn
• Application Number:
  US10/135,646
• Time in Patent Office: 386 Days
• Field of Search: 323/267, 323/265, 323/282, 323/284, 327/536, 327/436, 327/487, 307/82, 307/85, 307/81
• US Class Current: 323/267
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps

Abstract

The present invention provides a circuit and method having a fast response time for generating a regulated voltage from a first voltage source. The circuit includes a driver for generating a drive signal. The driver has a clock input coupled to a clock signal. A charge pump that has a first voltage input coupled to the first voltage source. In response to the drive signal, the charge pump provides a pump voltage that is boosted from the first voltage. An amplifier has a reference input coupled to a reference voltage, a sense input coupled to a sense signal representative of the pump voltage, and an output. The amplifier is operable in response to a difference between the reference voltage and the sense signal, to control the driver. A switch is coupled from the amplifier output to an output of the charge pump such that the pump voltage is controllably boosted by the amplifier output through the switch. In another aspect of the invention the circuit is arranged in a cascode configuration to provide a low noise output voltage. The cascode configuration can provide a low noise output having an increased ripple frequency and reduced ripple amplitude. In addition, in another aspect of the invention, the cascode configuration can provide an output voltage level that is not limited by the level of the supply voltage.

Claims

1. A cascode circuit for generating a regulated voltage from a supply voltage, comprising:

at least first and second regulator circuits being coupled in a cascode configuration for generating a regulated voltage, each regulator circuit including;

a driver for generating a drive signal;

a charge pump having a first voltage input coupled to a first voltage source, being responsive to the drive signal, to provide a pump voltage that is boosted from a voltage level of the first voltage source;

a voltage buffer coupled between a supply voltage source and the charge pump for generating an output voltage corresponding to the pump voltage;

an amplifier having a reference input coupled to a reference voltage, a sense input coupled to a sense signal representative of the pump voltage, and an output, operable in response to a difference between the reference voltage and the sense signal, to control the driver; and

a switch being coupled from the amplifier output to an output of the charge pump such that the pump voltage is controllably boosted by the amplifier output through the switch.

2. The cascode circuit of claim 1 wherein the first voltage sources of each of the regulator circuits are coupled together.

3. The cascode circuit of claim 1 wherein the regulator circuits further include a sense circuit coupled between the voltage buffer and the amplifier sense input.

4. The cascode circuit of claim 1 wherein the switch is a diode.

5. The cascode circuit of claim 4 wherein the switch is an active device.

6. The cascode circuit of claim 5 wherein the active device is an NMOS FET.

7. The cascode circuit of claim 5 further including a switch controller, operable in response to a switch control criteria, to control the active device.

8. The cascode circuit of claim 7 wherein the switch control criteria is selected from the group of the pump voltage, the sensed voltage, and a predetermined time delay.

9. The cascode circuit of claim 1 wherein the charge pump further includes a mode control input, operable in response to a mode control signal, to select an operating mode of the charge pump, the operating mode being selected from the group of normal charge rate and fast charge rate.

10. The cascode circuit of claim 1 wherein an output of the first regulator circuit having a voltage level is coupled to the second regulator circuit, the second regulator circuit generating an output voltage that is greater than the voltage level of the output of the first regulator circuit.

11. A cascode circuit for generating a regulated voltage from a supply voltage, comprising:

at least first and second regulator means being coupled in a cascode configuration for generating a regulated voltage, each regulator circuit including;

driver means for generating a drive signal;

charge pump means for generating a pump voltage, from a first voltage source, in response to the drive signal;

voltage buffer means for generating an output voltage corresponding to the pump voltage;

amplifier means for controlling the driver in response to a reference voltage and a sense signal representative of the pump voltage; and

switch means for providing a path through which the pump voltage is controllably boosted by the amplifier means.

12. The cascode circuit of claim 11 wherein the first voltage source of each of the regulator means are coupled together.

13. The cascode circuit of claim 11 wherein the regulator means further include sense circuit means for generating the sense signal.

14. The cascode circuit of claim 11 wherein the switch means is a diode.

15. The cascode circuit of claim 14 wherein the switch means is an active device.

16. The cascode circuit of claim 15 wherein the active device is an NMOS FET.

17. The cascode circuit of claim 15 further including switch controller means for controlling the active device in response to a switch control criteria.

18. The cascode circuit of claim 17 wherein the switch control criteria is selected from the group of the pump voltage, the sensed voltage, and a predetermined time delay.

19. The cascode circuit of claim 11 wherein the charge pump means further selects an operating mode of the charge pump, the operating mode being selected from the group of normal charge rate and fast charge rate.

25. The cascode circuit of claim 11 wherein an output of the first regulator means having a voltage level is coupled to the second regulator means, the second regulator means generating an output voltage that is greater than the voltage level of the output of the first regulator means.

20. A method of generating at least two regulated voltages, each comprising the steps of:

generating a drive signal;

generating a pump voltage in response to the drive signal, the pump voltage being boosted from a first voltage source;

generating an output voltage corresponding to the pump voltage;

generating an error signal in response to determining a difference between a reference voltage and a sense signal representative of the output voltage;

controlling the drive signal in response to the error signal; and

applying a representation of the error signal to the pump voltage, such that the pump voltage is controllably boosted; and

coupling the at least two regulated voltages in a cascode configuration.

21. The method of claim 20 further including the step of coupling the first voltage source of each of the regulated voltages together.

22. The method of claim 20 wherein the step of applying a representation further includes the step of controlling the application of the error signal in response to a switch control criteria.

23. The method of claim 22 wherein the switch control criteria is selected from the group of the pump voltage, the sensed voltage, and a predetermined time delay.

24. The method of claim 20 wherein the step of generating a pump voltage includes the step of selecting an operating mode of the charge pump, the operating mode being selected from the group of normal charge rate and fast charge rate.