Docking PCI to PCI bridge using IEEE 1394 link

• US 6,567,876 B1
• Filed: 12/03/1999
• Issued: 05/20/2003
• Est. Priority Date: 12/03/1999
• Status: Expired due to Fees

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Inventors: Stufflebeam, Ken
• Primary Examiner(s): Dharia, Rupal
• Assistant Examiner(s): VO, TIM T
• Application Number:
  US09/454,957
• Time in Patent Office: 1,264 Days
• Field of Search: 710/300, 710/301, 710/302, 710/303, 710/304
• US Class Current: 710/303
• CPC Class Codes: G06F 13/4045 where the bus bridge performs an extender function
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A computer system and associated docking station couple via PCI bus signals and sideband signals using a hot pluggable serial bus between a pair of PCI bridges, one bridge located in the computer, and one bridge located in the dock. The hot pluggable bus preferably comprises an IEEE 1394 serial bus. Each bridge captures the state of the PCI bus during selected PCI cycles and transmits the bus values to the other bridge over the IEEE 1394 bus. The bridge that receives the PCI values drives its own PCI bus with the values captured on the other PCI bus, thus performing the duties of a conventional PCI-to-PCI bridge. The docking bridges exchange sideband signals in a similar manner over the IEEE 1394 bus.

Claims

1. A computer system, comprising:

a processor;

a memory array coupled to said processor;

a primary expansion bus coupled to said processor and said memory array; and

a bus bridge coupled to said expansion bus, said bus bridge comprising;

a primary bus interface that transmits and receives data over said primary expansion bus; and

a secondary bus interface coupled to said primary bus interface and configured to transmit and receive data over a hot pluggable secondary expansion bus, wherein said bus bridge captures the values of signals on said primary expansion bus and transmits the captured bus values through said secondary bus interface;

wherein said bus bridge receives primary expansion bus values through said secondary bus interface and drives said primary expansion bus with the received bus values;

wherein said secondary expansion bus comprises a serial bus;

said computer system also including a peripheral device coupled to said expansion bus and a sideband signal coupling said peripheral device to said bus bridge, wherein said bus bridge captures the value of the sideband signal and transmits the captured sideband value through said serial bus;

wherein said bus bridge also receives a sideband value through said serial bus interface and drives the sideband signal with the received sideband value; and

wherein said bus bridge includes a packetizer coupled to said primary and secondary bus interfaces, wherein said packetizer creates outgoing data packets that carry captured signals transmitted through said serial bus interface.

2. The computer system of claim 1, wherein said packetizer extracts received signal values from incoming bus packets received through said serial bus interface.

3. The computer system of claim 1, wherein said bus bridge further includes an encoder that creates a signal type field for each outgoing data packet created by said packetizer, wherein the signal type field indicates whether the associated packet carries the values of primary expansion bus signals.

4. The computer system of claim 3, wherein said encoder determines whether an incoming data packet carries primary expansion bus values.

5. The computer system of claim 3, wherein the signal type field indicates whether the associated packet carries the value of the sideband signal.

6. The computer system of claim 5, wherein said encoder determines whether an incoming data packet carries a sideband signal value.

7. A computer system, comprising:

a processor;

an input device operatively coupled to said processor;

a main memory coupled to said processor;

a first expansion bus coupled to said processor and said main memory;

a first docking bridge coupled to said expansion bus;

a docking station, including a second expansion bus and a second docking bridge coupling said second expansion bus to said first expansion bus via said first docking bridge; and

a hot pluggable serial bus coupling said first docking bridge to said second docking bridge;

wherein said first docking bridge captures the values of signals on the first expansion bus and transfers the captured values to said second docking bridge, and wherein said second docking bridge drives the second expansion bus with the values captured from said first expansion bus;

wherein said second docking bridge captures the values of signals on the second expansion bus and transfers the captured values to said first docking bridge, and wherein said first docking bridge drives the first expansion bus with the values captured from said second expansion bus;

said computer system further includes a first peripheral device coupled to said first docking bridge via a first outgoing sideband signal and a second peripheral device coupled to said second docking bridge via a first incoming sideband signal, wherein said first docking bridge captures the value of the first outgoing sideband signal and transmits the captured first sideband value to said second docking bridge, wherein said second docking bridge drives the first incoming sideband signal with the captured first sideband value; and

a second outgoing sideband signal coupling said first peripheral device to said first docking bridge, and including a second incoming signal coupling said second peripheral device to said second docking bridge, wherein said second docking bridge captures the value of the second outgoing sideband signal and transmits the captured second sideband value to said first docking bridge, wherein said first docking bridge drives the second incoming sideband signal with the captured second sideband value;

wherein said first docking bridge and said second docking bridge each comprises;

an expansion bus interface that transmits and receives data over an expansion bus;

a packetizer coupled to said expansion bus interface and that creates serial bus packets which carry expansion bus signals and sideband signals over said serial bus;

an encoder that creates a data field identifying the contents of outgoing data packets, wherein said packetizer includes the data field in each serial bus packet; and

a serial bus interface that transmits and receives packets over said serial bus.

8. The computer system of claim 7, wherein said packetizer disassembles incoming packets received over said serial bus to extract expansion bus signals and sideband signals enclosed in the packets.

9. The computer system of claim 8, wherein said encoder captures and drives the values of sideband signal coupled to each docking bridge.

10. A docking bridge for interfacing a computer system and an expansion base, comprising:

an expansion bus interface configured to transmit and receive data over an expansion bus and to capture the values of expansion bus signals;

an encoder configured to capture sideband signals running between the computer and expansion base and that receives captured expansion bus values from said expansion bus interface;

a packetizer coupled to said encoder and that creates data packets containing captured signal values in said encoder; and

a serial bus driver coupled to said packetizer and configured to transmit and receive data packets over a serial bus.

11. The docking bridge of claim 10, wherein said serial bus driver comprises a driver for a hot pluggable bus.

12. The docking bridge of claim 11, wherein said serial bus driver comprises an IEEE 1394 bus driver.

13. The docking bridge of claim 11, wherein said encoder creates a signal type code that indicates whether a data packet comprises expansion bus values and that indicates whether a data packet comprises a sideband signal value.

14. The docking bridge of claim 13, wherein said packetizer inserts the signal type code into each data packet to identify the contents of the data packet.

15. The docking bridge of claim 14, wherein said packetizer extracts expansion bus signals and sideband signals from data packets received through said serial bus driver.

16. The docking bridge of claim 15, wherein said encoder interprets signal type codes in data packets received through said serial bus driver to determine if the packets contain expansion bus values.

17. The docking bridge of claim 15, wherein said encoder interprets signal type codes in data packets received through said serial bus driver to determine if the packets contain sideband signal values.

18. The docking bridge of claim 16, wherein said encoder transfers to said expansion bus interface the expansion bus values extracted from packets received through said serial bus driver, and wherein said expansion bus interface is configured to drive an expansion bus with values received from said encoder.

19. The docking bridge of claim 17, wherein said encoder is configured to drive sideband signals with sideband values extracted from packets received through said serial bus driver.

20. A computer system including an expansion base, comprising:

a processor;

a memory device coupled to said processor;

a bus interface coupled to said processor and that transmits and receives data over a first bus and that captures the values of signals from said first bus;

an encoder that captures sideband signals running between the computer and the expansion base and that receives the captured values from said bus interface;

a packetizer coupled to said encoder and that creates data packets containing captured signal values in said encoder; and

a bus driver coupled to said packetizer and that transmits and receives data packets over a second bus.

21. The system of claim 20 wherein the bus driver comprises a driver for a hot pluggable bus.

22. The system of claim 20 wherein said second bus comprises a serial bus.

23. A docking bridge for interfacing a computer system and an expansion base, comprising:

a first bus interface configured to transmit and receive data over a first bus and to capture the values of signals from said first bus;

an encoder configured to capture sideband signals running between the computer and the expansion base and that receives the captured values from said first bus interface;

a packetizer coupled to said encoder and that creates data packets containing captured signal values in said encoder; and

a bus driver coupled to said packetizer and configured to transmit and receive data packets over a second bus.

24. The docking bridge of claim 23 wherein said second bus comprises a serial bus.

25. The docking bridge of claim 23 wherein the bus driver comprises a driver for a hot pluggable bus.