Structure of a ball-grid array package substrate and processes for producing thereof

• US 6,569,712 B2
• Filed: 02/27/2002
• Issued: 05/27/2003
• Est. Priority Date: 10/19/2001
• Status: Active Grant

• Current Assignee: VIA Technologies Incorporated (VIA Technologies)
• Original Assignee: VIA Technologies Incorporated (VIA Technologies)
• Inventors: Tung, Lin-Chou, Fu, Jackie, Ho, Kwun-Yao, Kung, Moriss
• Primary Examiner(s): Paladini, Albert W.
• Assistant Examiner(s): THAI, LUAN C
• Application Number:
  US10/083,105
• Publication Number:
  US 20030075357A1
• Time in Patent Office: 454 Days
• Field of Search: 438/121, 438/108, 438/122, 438/612, 438/613, 438/617, 438/667, 257/774, 257/772, 257/738, 257/780, 257/784
• US Class Current: 438/121
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/85399 Material
• CPC Class Codes: H01L 2224/92247 the second connecting process involving a wire connector
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/36 Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/42 Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
• CPC Class Codes: H01L 23/49524 the additional leads being a tape carrier or flat leads
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/207 : Diameter ranges
• CPC Class Codes: H05K 1/0206 : by printed thermal vias
• CPC Class Codes: H05K 1/112 : directly combined with via connections
• CPC Class Codes: H05K 3/4069 : for via connections in organic insulating substrates
• CPC Class Codes: Y10T 29/49144 : by metal fusion
• CPC Class Codes: Y10T 29/49155 : Manufacturing circuit on or in base

Abstract

An improved structure of a ball-grid array (BGA) package substrate and processes for producing thereof are disclosed, wherein one side of the BGA substrate has a single pattern layer for connecting with solder balls and a heat sink layer is bonded to the other side of the substrate. The heat sink layer provides not only heat dissipation for the substrate, but also patterns for power and/or for ground, so as to diminish the dimension required for the patterns for power and/or for ground on the pattern layer of the substrate. The solder balls for power and/or for ground of the substrate are connected with the heat sink layer through electrically and thermally conductive via holes plugged with conductive paste.

Claims

1. A process for producing a structure of a ball-grid array (BGA) package substrate, comprising the steps of:

providing a substrate, wherein two sides of said substrate are respectively covered with one layer of a release film;

forming a plurality of via holes and a cavity in said substrate, wherein said via holes are located in predetermined positions of solder balls for ground of said substrate, and said cavity is located for receiving a chip;

plugging conductive paste in said via holes of said substrate;

removing said release films;

laminating a heat sink layer and a copper foil respectively on said two sides of said substrate;

patterning said copper foil to form a pattern layer having patterns for connecting said solder balls and conductive traces of said substrate;

coating black ink on said heat sink layer;

forming a layer of black oxide onto the surface of said heat sink layer within said cavity;

coating a solder mask on said pattern layer;

performing a photolithography procedure to bare portions of said pattern layer where said solder balls are connected;

performing an electroplating process to plate in turn a Ni film and an Au film on said uncovered portions of said pattern layer;

mounting said solder balls onto said Au film of said pattern layer; and

setting said chip onto said layer of black oxide, and connecting bonding pads of said chip with said patterns for connecting said solder balls as well as said conductive traces of said substrate by wire bonding.

2. The process of claim 1, wherein said conductive paste comprises silver paste and copper paste, and said via holes are plugged with said conductive paste by printing.

3. The process of claim 1, wherein said release films are easily separated from with said conductive paste.

4. The process of claim 1, wherein said release film comprises polyethylene film, polypropylene film, polyester (PET) film or acrylic resin.

5. The process of claim 1, wherein said substrate is selected from the group consisting of a flexible type and a rigid type.

6. The process of claim 1, further comprising covering a protective film on said pattern layer before forming a layer of black oxide within said cavity and then removing said protective film before said solder mask is coated.

7. A process for producing a structure of a ball-grid array (BGA) package substrate, comprising the steps of:

providing a substrate, wherein one side of said substrate includes a layer of copper foil;

covering the two sides of said substrate respectively with one layer of a release film;

forming a plurality of via holes and a cavity in said substrate, wherein said via holes are located in predetermined positions of ball-grid for ground and of ball-grid for power of said substrate, and said cavity is located for receiving a chip;

plugging conductive paste in said via holes of said substrate;

removing said release films;

laminating a heat sink layer in the other side of said substrate;

forming a layer of black oxide onto the surface of said heat sink layer within said cavity;

patterning said copper foil to form a pattern layer having signal patterns and patterns for connecting power solder balls and for connecting ground solder balls;

patterning said heat sink layer to form therein patterns for power and for ground;

coating a black ink layer on said heat sink layer;

coating a solder mask on said pattern layer, and then performing a photolithography procedure to bare portions of said pattern layer where said power solder balls and said ground solder balls are connected;

performing an electroplating process to plate in turn a Ni film and an Au film on said uncovered portions of said pattern layer; and

mounting said solder balls onto said Au film of said pattern layer so that said power solder balls and said ground solder balls of said substrate are respectively connected to said patterns for power and for ground of said heat sink layer through said conductive paste in said via holes of said substrate; and

setting said chip onto said layer of black oxide, and then connecting bonding pads of said chip with said patterns for connecting said solder balls as well as said conductive traces of said substrate by wire bonding.

8. The process of claim 7, wherein said step of patterning said copper foil and said heat sink layer are performed by photolithography and etching procedures.

9. The process of claim 7, wherein said conductive paste comprises silver paste and copper paste, and said conductive paste is plugged into said via holes by printing.

10. The process of claim 7, wherein said release films are easily separated from said conductive paste.

11. The process of claim 7, wherein said release film comprises polyethylene film, polypropylene film, polyester (PET) film or acrylic resin.

12. The process of claim 7, wherein said substrate is selected from the group consisting of a flexible type and a rigid type.