Process for manufacturing trench gated MOSFET having drain/drift region

• US 6,569,738 B2
• Filed: 07/03/2001
• Issued: 05/27/2003
• Est. Priority Date: 07/03/2001
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Darwish, Mohamed N.
• Primary Examiner(s): Niebling, John F.
• Assistant Examiner(s): Roman, Angel
• Application Number:
  US09/898,652
• Publication Number:
  US 20030006454A1
• Time in Patent Office: 693 Days
• Field of Search: 438/268, 438/270, 438/271, 438/272, 438/558
• US Class Current: 438/270
• CPC Class Codes: H01L 21/2253 by ion implantation
• CPC Class Codes: H01L 29/0634 Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
• CPC Class Codes: H01L 29/0847 of field-effect transistors with insulated gate H01L29/0653 takes precedence; with a passive supplementary region between source or drain and substrate related to punch-through, capacity or isolation phenomena H01L29/1079; with LDD or DDD structure H01L29/7833; for thin film transistors H01L29/78618
• CPC Class Codes: H01L 29/0878 Impurity concentration or distribution
• CPC Class Codes: H01L 29/1095 Body region, i.e. base region, of DMOS transistors or IGBTs cell layout H01L29/0696
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trench MOSFET is formed in a structure which includes a P-type epitaxial layer overlying an N+ substrate. An N-type dopant is implanted through the bottom of the trench into the P-epitaxial layer to form a buried layer below the trench, and after a up-diffusion step a N drain-drift region extends between the N+ substrate and the bottom of the trench. The result is a more controllable doping profile of the N-type dopant below the trench. The body region may also be formed by implanting P-type dopant into the epitaxial layer, in which case the background doping of the epitaxial layer may be either lightly doped P- or N-type. A MOSFET constructed in accordance with this invention can have a reduced threshold voltage and on-resistance and an increased punchthrough breakdown voltage.

Claims

1. A process of fabricating a power MOSFET comprising:

providing a substrate of a first conductivity type;

growing an epitaxial layer on the substrate;

forming a trench in the epitaxial layer;

introducing dopant of the first conductivity type through a bottom of the trench to form a buried layer below the bottom of the trench;

causing the dopant of the first conductivity type to diffuse upward until the dopant of the first conductivity reaches the bottom of the trench thereby forming a drain-drift region;

forming an insulating layer along the bottom and a sidewall of the trench;

introducing a conductive gate material into the trench; and

introducing dopant of the first conductivity type into the epitaxial layer to form a source region, the drain-drift region and the source region being formed under conditions such that the source region and drain-drift region are separated by a channel region of the epitaxial layer adjacent the sidewall of the trench.

2. The method of claim 1 wherein growing an epitaxial layer comprises growing an epitaxial layer of a second conductivity type opposite to the first conductivity type on the substrate.

3. The method of claim 2 comprising implanting a body dopant of the second conductivity type into the epitaxial layer and driving the body dopant in until the body dopant reaches an interface between the epitaxial layer and the substrate.

4. The method of claim 1 wherein growing an epitaxial layer comprises growing an epitaxial layer of a first conductivity type on the substrate.

5. The method of claim 4 comprising implanting a body dopant of a second conductivity type opposite to the first conductivity type into the epitaxial layer and driving the body dopant in until the body dopant reaches an interface between the epitaxial layer and the substrate.

6. The method of claim 1 wherein introducing dopant of the first conductivity type through a bottom of the trench is performed by implanting dopant at an energy of from 300 keV to 3.0 MeV.