Source controlled cache allocation

• US 6,574,708 B2
• Filed: 05/18/2001
• Issued: 06/03/2003
• Est. Priority Date: 05/18/2001
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Hayter, Mark D., Rowlands, Joseph B.
• Primary Examiner(s): Nguyen, T. V.
• Application Number:
  US09/861,186
• Publication Number:
  US 20020174299A1
• Time in Patent Office: 746 Days
• Field of Search: 711/118, 711/133, 711/134, 711/136, 711/139, 711/144, 711/145, 711/138, 711/170, 711/173
• US Class Current: 711/118
• CPC Class Codes: G06F 12/0888 using selective caching, e.g. bypass

Abstract

A cache is coupled to receive an access which includes a cache allocate indication. If the access is a miss in the cache, the cache either allocates a cache block storage location to store the cache block addressed by the access or does not allocate a cache block storage location in response to the cache allocate indication. In one implementation, the cache is coupled to an interconnect with one or more agents. In such an implementation, the cache accesses may be performed in response to transactions on the interconnect, and the transactions include the cache allocate indication. Thus, the source of a cache access specifies whether or not to allocate a cache block storage location in response to a miss by the cache access. The source may use a variety of mechanisms for generating the cache allocate indication.

Claims

1. A system comprising:

an agent configured to initiate a cacheable transaction addressing a first cache block;

a cache coupled to receive the transaction, the cache including a plurality of cache block storage locations for storing cache blocks;

wherein the agent is configured to transmit a cache allocate indication in an initial transmission of the transaction, wherein the cache allocate indication indicates whether or not the cache is to allocate one of the plurality of cache block storage locations to store the first cache block if the transaction is a miss in the cache; and

wherein the cache, if the transaction is a miss, is configured to selectively allocate one of the plurality of cache block storage locations to store the first cache block responsive to the cache allocate indication.

2. The system as recited in claim 1 wherein the cache, if the transaction is a hit in a first cache block storage location of the plurality of cache block storage locations, is configured to receive the first cache block into the first cache block storage location or provide the first cache block from the first cache block storage location in response to the transaction independent of the cache allocate indication.

3. The system as recited in claim 1 wherein the agent and the cache are coupled to an interconnect, and wherein the agent is configured to initiate the transaction on the interconnect, and wherein the cache is configured to receive the transaction from the interconnect.

4. The system as recited in claim 3 wherein the transaction includes at least an address phase and a data phase on the interconnect, and wherein the agent is configured to transmit the cache allocate indication during the address phase.

5. The system as recited in claim 1 wherein the agent comprises a processor, and wherein the transaction is a prefetch, and wherein the processor transmits the cache allocate indication in a state indicating that the cache is to allocate one of the plurality of cache block storage locations to store the first cache block.

6. The system as recited in claim 1 wherein the agent comprises a processor, and wherein the transaction is a prefetch, and wherein the processor transmits the cache allocate indication in a state indicating that the cache is not to allocate one of the plurality of cache block storage locations to store the first cache block.

7. The system as recited in claim 1 wherein the agent comprises a processor including a translation lookaside buffer (TLB), and wherein the TLB is configured to store a cache attribute corresponding to a page including the first cache block, and wherein the processor is configured to generate the cache allocate indication responsive to the cache attribute.

8. The system as recited in claim 1 wherein the agent is configured to perform the transaction in response to a second transaction on an input/output interface, and wherein the second transaction includes an isochronous indication, and wherein the agent is configured to generate the cache allocate indication responsive to the isochronous indication.

9. The system as recited in claim 1 further comprising an address mapper configured to map a first address received on an input/output interface to a second address of the first cache block, and wherein the address mapper is configured to generate the cache allocate indication.

10. The system as recited in claim 9 wherein the address mapper is configured to map a portion of an address space including the first address, and wherein the agent is configured to transmit the cache allocate indication in a state indicating that the cache is not to allocate one of the plurality of cache block storage locations responsive to the first address being outside the portion.

11. The system as recited in claim 1 wherein the agent is configured to initiate a plurality of transactions including the transaction in response to receiving a packet on a network interface, and wherein the agent is configured to transmit an initial number of the plurality of transactions with the cache allocate indication in a first state indicating that the cache is to allocate one of the cache block storage locations, and wherein the agent is configured to transmit the cache allocate indication for the transaction in the first state if the transaction is one of the initial number of the plurality of transactions.

12. The system as recited in claim 11 wherein the agent is configured to transmit a remaining number of the plurality of transactions with the cache allocate indication in a second state indicating that the cache is not to allocate one of the cache block storage locations, and wherein the agent is configured to transmit the cache allocate indication for the transaction in the second state if the transaction is one of the remaining number of transactions.

13. An apparatus comprising:

a first circuit configured to generate a request for a cacheable transaction addressing a first cache block on an interconnect, the first circuit further configured to determine whether or not a cache on the interconnect is to allocate a cache block storage location to store the first cache block if the first cache block is a miss in the cache; and

a second circuit configured to transmit the transaction on the interconnect, the transaction including a cache allocate indication in an initial transmission of the transaction indicating whether or not a cache on the interconnect is to allocate a cache block storage location to store the first cache block if the first cache block is a miss in the cache.

14. The apparatus as recited in claim 13 wherein, if the transaction is a prefetch, the first circuit is configured to determine that the cache is to allocate the cache block storage location.

15. The apparatus as recited in claim 13 wherein the first circuit includes a translation lookaside buffer (TLB), wherein the TLB is configured to store a cache attribute corresponding to a page including the first cache block, and wherein the first circuit is configured to determine the cache allocate indication responsive to the cache attribute.

16. The apparatus as recited in claim 13 wherein the first circuit is coupled to receive a second transaction on an input/output interface and is configured to request the transaction in response thereto, and wherein the second transaction includes an isochronous indication, and wherein the first circuit is configured to generate the cache allocate indication responsive to the isochronous indication.

17. The apparatus as recited in claim 13 wherein the first circuit further comprises an address mapper configured to map a first address of received on an input/output interface to a second address of the first cache block, and wherein the address mapper is configured to generate the cache allocate indication.

18. The apparatus as recited in claim 17 wherein the address mapper is configured to map a portion of an address space including the first address, and wherein the first circuit is configured to transmit the cache allocate indication in a state indicating that the cache is not to allocate one of the plurality of cache block storage locations responsive to the first address being outside the portion.

19. The apparatus as recited in claim 13 wherein the first circuit is configured to initiate a plurality of transactions including the transaction in response to receiving a packet on a network interface, and wherein the first circuit is configured to determine the cache allocate indication for each transaction dependent on whether or not that transaction is within an initial number of the plurality of transactions.

20. A method comprising:

initiating a cacheable transaction, the initiating including transmitting a cache allocate indication indicating whether or not a cache on the interconnect is to allocate a cache block storage location to store the first cache block if the first cache block is a miss in the cache;

detecting a miss in the cache for the first cache block; and

selectively allocating storage in the cache responsive to detecting the miss and responsive to the cache allocate indication.

21. The method as recited in claim 20 further comprising responding to the transaction if the transaction is a hit in the cache, the responding independent of the cache allocate indication.

22. The method as recited in claim 20 further comprising generating the cache allocate indication responsive to whether or not the transaction is a prefetch.

23. The method as recited in claim 20 further comprising generating the cache allocate indication responsive to a cache attribute of a page including the first cache block.

24. The method as recited in claim 20 further comprising:

requesting the transaction responsive to a second transaction received on an input/output interface, the second transaction including an isochronous indication; and

generating the cache allocate indication responsive to the isochronous indication.

25. The method as recited in claim 20 further comprising transmitting a plurality of transactions including the transaction in response to receiving a packet on a network interface, wherein an initial number of the plurality of transactions include the cache allocate indication indicating that the cache is to allocate one of the cache block storage locations.

26. The method as recited in claim 25, wherein a remaining number of the plurality of transactions include the cache allocate indication indicating that the cache is not to allocate one of the cache block storage locations.

27. A carrier medium comprising a database used by a program in an integrated circuit fabrication process, the database representing:

an agent configured to initiate a cacheable transaction addressing a first cache block;

a cache coupled to receive the transaction, the cache including a plurality of cache block storage locations for storing cache blocks;

wherein the agent is configured to transmit a cache allocate indication in an initial transmission of the transaction, wherein the cache allocate indication indicates whether or not the cache is to allocate one of the plurality of cache block storage locations to store the first cache block if the transaction is a miss in the cache; and

wherein the cache, if the transaction is a miss, is configured to selectively allocate one of the plurality of cache block storage locations to store the first cache block responsive to the cache allocate indication.

28. The carrier medium as recited in claim 27 wherein the cache, if the transaction is a hit in a first cache block storage location of the plurality of cache block storage locations, is configured to receive the first cache block into the first cache block storage location or provide the first cache block from the first cache block storage location in response to the transaction independent of the cache allocate indication.

29. The carrier medium as recited in claim 27 wherein the agent and the cache are coupled to an interconnect, and wherein the agent is configured to initiate the transaction on the interconnect, and wherein the cache is configured to receive the transaction from the interconnect.

30. The carrier medium as recited in claim 29 wherein the transaction includes at least an address phase and a data phase on the interconnect, and wherein the agent is configured to transmit the cache allocate indication during the address phase.

31. The carrier medium as recited in claim 27 wherein the agent comprises a processor, and wherein the transaction is a prefetch, and wherein the processor transmits the cache allocate indication in a state indicating that the cache is to allocate one of the plurality of cache block storage locations to store the first cache block.

32. The carrier medium as recited in claim 27 wherein the agent comprises a processor, and wherein the transaction is a prefetch, and wherein the processor transmits the cache allocate indication in a state indicating that the cache is not to allocate one of the plurality of cache block storage locations to store the first cache block.

33. The carrier medium as recited in claim 27 wherein the agent comprises a processor including a translation lookaside buffer (TLB), and wherein the TLB is configured to store a cache attribute corresponding to a page including the first cache block, and wherein the processor is configured to generate the cache allocate indication responsive to the cache attribute.

34. The carrier medium as recited in claim 27 wherein the agent is configured to perform the transaction in response to a second transaction on an input/output interface, and wherein the second transaction includes an isochronous indication, and wherein the agent is configured to generate the cache allocate indication responsive to the isochronous indication.

35. The carrier medium as recited in claim 27 wherein the database further represents an address mapper configured to map a first address received on an input/output interface to a second address of the first cache block, and wherein the address mapper is configured to generate the cache allocate indication.

36. The carrier medium as recited in claim 35 wherein the address mapper is configured to map a portion of an address space including the first address, and wherein the agent is configured to transmit the cache allocate indication in a state indicating that the cache is not to allocate one of the plurality of cache block storage locations responsive to the first address being outside the portion.

37. The carrier medium as recited in claim 27 wherein the agent is configured to initiate a plurality of transactions including the transaction in response to receiving a packet on a network interface, and wherein the agent is configured to transmit an initial number of the plurality of transactions with the cache allocate indication in a first state indicating that the cache is to allocate one of the cache block storage locations, and wherein the agent is configured to transmit the cache allocate indication for the transaction in the first state if the transaction is one of the initial number of the plurality of transactions.

38. The carrier medium as recited in claim 37 wherein the agent is configured to transmit a remaining number of the plurality of transactions with the cache allocate indication in a second state indicating that the cache is not to allocate one of the cache block storage locations, and wherein the agent is configured to transmit the cache allocate indication for the transaction in the second state if the transaction is one of the remaining number of transactions.