Semiconductor device and fabrication method thereof
First Claim
1. A semiconductor device including a pixel unit and a driving circuit which are formed over a substrate, wherein:
- a first LDD region of an n-channel TFT forming said driving circuit is formed in such a fashion that the whole part of said first LDD region overlaps with a gate wiring of said n-channel TFT while sandwiching a gate insulation film between them; and
a second LDD region of a pixel TFT forming said pixel unit is formed in such a fashion that said second LDD region does not overlap with a gate wiring of said pixel TFT while sandwiching a gate insulation film between them.
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Accused Products
Abstract
This invention provides a semiconductor device having high operation performance and high reliability. An LDD region 707 overlapping with a gate wiring is arranged in an n-channel TFT 802 forming a driving circuit, and a TFT structure highly resistant to hot carrier injection is achieved. LDD regions 717, 718, 719 and 720 not overlapping with a gate wiring are arranged in an n-channel TFT 804 forming a pixel unit. As a result, a TFT structure having a small OFF current value is achieved. In this instance, an element belonging to the Group 15 of the Periodic Table exists in a higher concentration in the LDD region 707 than in the LDD regions 717, 718, 719 and 720.
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Citations
43 Claims
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1. A semiconductor device including a pixel unit and a driving circuit which are formed over a substrate, wherein:
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a first LDD region of an n-channel TFT forming said driving circuit is formed in such a fashion that the whole part of said first LDD region overlaps with a gate wiring of said n-channel TFT while sandwiching a gate insulation film between them; and
a second LDD region of a pixel TFT forming said pixel unit is formed in such a fashion that said second LDD region does not overlap with a gate wiring of said pixel TFT while sandwiching a gate insulation film between them. - View Dependent Claims (5, 7, 12, 13)
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2. A semiconductor device including a pixel unit and a driving circuit which are formed over a substrate, wherein:
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a first LDD region of an n-channel TFT forming said driving circuit is formed in such a fashion that the whole part of said first LDD region overlaps with a gate wiring of said n-channel TFT while sandwiching a gate insulation film between them;
a second LDD region of a pixel TFT forming said pixel unit is formed in such a fashion that said second LDD region does not overlap with a gate wiring of said pixel TFT while sandwiching a gate insulation film between them; and
a capacitor formed in said pixel unit, said capacitor comprising a shading film disposed on a resin film, an oxide of said shading film, and a pixel electrode disposed on said oxide. - View Dependent Claims (10, 11)
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3. A semiconductor device including a pixel unit and a driving circuit which are formed over a substrate, wherein:
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said driving circuit includes a first n-channel TFT formed in such a fashion that the whole part of at least one first LDD region overlaps with a first gate wiring while sandwiching a first gate insulation film between them and a second n-channel TFT formed in such a fashion that a part of at least one second LDD region overlaps with a second gate wiring while sandwiching a second gate insulation film between them; and
said pixel unit includes a pixel TFT formed in such a fashion that at least one third LDD region does not overlap with a third gate wiring while sandwiching a third gate insulation film between them. - View Dependent Claims (6, 8, 9)
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4. A semiconductor device including a pixel unit and a driving circuit which are formed over a substrate, wherein:
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said driving circuit includes a first n-channel TFT formed in such a fashion that the whole part of at least one first LDD region overlaps with a first gate wiring while sandwiching a first gate insulation film between them and a second n-channel TFT formed in such a fashion that a part of at least one second LDD region overlaps with a second gate wiring while sandwiching a second gate insulation film between them;
said pixel unit includes a pixel TFT formed in such a fashion that at least one third LDD region does not overlap with a third gate wiring while sandwiching a third gate insulation film between them; and
a capacitor formed in said pixel unit, said capacitor comprising a shading film disposed on a resin film, an oxide of said shading film, and a pixel electrode disposed on said oxide.
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14. A semiconductor device comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first thin film transistor formed over said substrate, said first thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, and said pixel portion comprising;
a second thin film transistor formed over said substrate, said second thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein said second LDD region does not overlap with said second gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (15, 16, 17)
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18. A semiconductor device comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first thin film transistor formed over said substrate, said first thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
a second thin film transistor formed over said substrate, said second thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, wherein a part of said second LDD region overlaps with said second gate electrode with said second gate insulating film interposed therebetween, and said pixel portion comprising;
a third thin film transistor formed over said substrate, said third thin film transistor comprising a third semiconductor layer and a third gate electrode adjacent to said third semiconductor layer with a third gate insulating film interposed therebetween;
wherein said third semiconductor layer includes third source and drain regions, a third channel region, and at least one third LDD region between said third channel region and said third source or drain region;
wherein said third LDD region does not overlap with said third gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (19, 20, 21)
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22. A phone comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first n-channel thin film transistor formed over said substrate, said first n-channel thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
a second n-channel thin film transistor formed over said substrate, said second n-channel thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, wherein a part of said second LDD region overlaps with said second gate electrode with said second gate insulating film interposed therebetween, and said pixel portion comprising;
a pixel thin film transistor formed over said substrate, said pixel thin film transistor comprising a third semiconductor layer and a third gate electrode adjacent to said third semiconductor layer with a third gate insulating film interposed therebetween;
wherein said third semiconductor layer includes third source and drain regions, a third channel region, and at least one third LDD region between said third channel region and said third source or drain region;
wherein said third LDD region does not overlap with said third gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (23, 24)
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25. A camera comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first n-channel thin film transistor formed over said substrate, said first n-channel thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
a second n-channel thin film transistor formed over said substrate, said second n-channel thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, wherein a part of said second LDD region overlaps with said second gate electrode with said second gate insulating film interposed therebetween, and said pixel portion comprising;
a pixel thin film transistor formed over said substrate, said pixel thin film transistor comprising a third semiconductor layer and a third gate electrode adjacent to said third semiconductor layer with a third gate insulating film interposed therebetween;
wherein said third semiconductor layer includes third source and drain regions, a third channel region, and at least one third LDD region between said third channel region and said third source or drain region;
wherein said third LDD region does not overlap with said third gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (26, 27)
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28. A digital camera comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first n-channel thin film transistor formed over said substrate, said first n-channel thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
a second n-channel thin film transistor formed over said substrate, said second n-channel thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, wherein a part of said second LDD region overlaps with said second gate electrode with said second gate insulating film interposed therebetween, and said pixel portion comprising;
a pixel thin film transistor formed over said substrate, said pixel thin film transistor comprising a third semiconductor layer and a third gate electrode adjacent to said third semiconductor layer with a third gate insulating film interposed therebetween;
wherein said third semiconductor layer includes third source and drain regions, a third channel region, and at least one third LDD region between said third channel region and said third source or drain region;
wherein said third LDD region does not overlap with said third gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (29)
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30. A computer comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first n-channel thin film transistor formed over said substrate, said first n-channel thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
a second n-channel thin film transistor formed over said substrate, said second n-channel thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, wherein a part of said second LDD region overlaps with said second gate electrode with said second gate insulating film interposed therebetween, and said pixel portion comprising;
a pixel thin film transistor formed over said substrate, said pixel thin film transistor comprising a third semiconductor layer and a third gate electrode adjacent to said third semiconductor layer with a third gate insulating film interposed therebetween;
wherein said third semiconductor layer includes third source and drain regions, a third channel region, and at least one third LDD region between said third channel region and said third source or drain region;
wherein said third LDD region does not overlap with said third gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (31)
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32. A projector comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first n-channel thin film transistor formed over said substrate, said first n-channel thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
a second n-channel thin film transistor formed over said substrate, said second n-channel thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, wherein a part of said second LDD region overlaps with said second gate electrode with said second gate insulating film interposed therebetween, and said pixel portion comprising;
a pixel thin film transistor formed over said substrate, said pixel thin film transistor comprising a third semiconductor layer and a third gate electrode adjacent to said third semiconductor layer with a third gate insulating film interposed therebetween;
wherein said third semiconductor layer includes third source and drain regions, a third channel region, and at least one third LDD region between said third channel region and said third source or drain region;
wherein said third LDD region does not overlap with said third gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (33)
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34. A semiconductor device comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first thin film transistor formed over said substrate, said first thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region between said first source and drain regions, and a first LDD region between said first channel region and said first drain region, said source region is in contact with said channel region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, and said pixel portion comprising;
a second thin film transistor formed over said substrate, said second thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein said second LDD region does not overlap with said second gate electrode with said second gate insulating film interposed therebetween. - View Dependent Claims (35, 36)
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37. A semiconductor device comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first thin film transistor formed over said substrate, said first thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, and said pixel portion comprising;
a second thin film transistor formed over said substrate, said second thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein said second LDD region does not overlap with said second gate electrode with said second gate insulating film interposed therebetween, a first insulating film comprising silicon nitride over said first and second thin film transistors;
a second insulating film over said first insulating film;
a third insulating film comprising resin over said second insulating film;
a pixel electrode over said third insulating film, said pixel electrode electrically connected to said second thin film transistor. - View Dependent Claims (38, 39)
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40. A semiconductor device comprising:
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a pixel portion and a driving portion formed over a substrate;
said driving portion comprising;
a first thin film transistor formed over said substrate, said first thin film transistor comprising a first semiconductor layer and a first gate electrode adjacent to said first semiconductor layer with a first gate insulating film interposed therebetween;
wherein said first semiconductor layer includes first source and drain regions, a first channel region, and at least one first LDD region between said first channel region and said first source or drain region;
wherein a whole part of said first LDD region overlaps with said first gate electrode with said first gate insulating film interposed therebetween, and said pixel portion comprising;
a second thin film transistor formed over said substrate, said second thin film transistor comprising a second semiconductor layer and a second gate electrode adjacent to said second semiconductor layer with a second gate insulating film interposed therebetween;
wherein said second semiconductor layer includes second source and drain regions, a second channel region, and at least one second LDD region between said second channel region and said second source or drain region;
wherein said second LDD region does not overlap with said second gate electrode with said second gate insulating film interposed therebetween. a first insulating film comprising silicon nitride over said first and second thin film transistors;
a second insulating film over said first insulating film;
a wiring over said second insulating film, said wiring connected to said second thin film transistor;
a third insulating film over said wiring and said second insulating film;
a fourth insulating film comprising resin over said wiring and said third insulating film; and
a pixel electrode over said third insulating film, said pixel electrode connected to said wiring. - View Dependent Claims (41, 42, 43)
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Specification