Integrated circuit memory devices having non-volatile memory transistors and methods of fabricating the same

• US 6,579,764 B2
• Filed: 08/15/2002
• Issued: 06/17/2003
• Est. Priority Date: 09/04/2000
• Status: Expired due to Fees

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Kuwazawa, Kazunobu
• Primary Examiner(s): Nelms, David
• Assistant Examiner(s): Vu, David
• Application Number:
  US10/222,299
• Publication Number:
  US 20020197788A1
• Time in Patent Office: 306 Days
• Field of Search: 438/257-267, 438/238, 438/585, 257/315-324, 257/296
• US Class Current: 438/258
• CPC Class Codes: G11C 11/005 comprising combined but independently operative RAM-ROM, RAM-PROM, RAM-EPROM cells
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: H01L 27/105 including field-effect components
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/42 Simultaneous manufacture of periphery and memory cells

Abstract

An integrated circuit device is provided that has a split-gate type memory transistor, a first capacitor element and a second capacitor element formed on a common chip. The dielectric strength of each of the split-gate type memory transistor, the first capacitor element and the second capacitor element can be improved. An intermediate insulation film of the split-gate type memory transistor can include a thermal oxide film, an HTO film, a side-section insulation film, and another thermal oxide film. A dielectric film of the first capacitor element can include a thermal oxide film, an HTO film, and another thermal oxide film, while a dielectric film of the second capacitor element can include a thermal oxide film, an HTO film, a silicon nitride film, and another thermal oxide film.

Claims

1. A method for manufacturing an integrated circuit device, comprising:

forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate;

forming a first thermal oxide film over a side surface of the floating gate, an upper surface of the first lower electrode, and an upper surface of the second lower electrode, wherein the first thermal oxide film over the side surface of the floating gate, the upper surface of the first lower electrode, and the upper surface of the second lower electrode become a component of an intermediate insulation film, a component of a first dielectric film, and a component of a second dielectric film, respectively;

forming an HTO film over the first thermal oxide film, wherein the HTO film over the first thermal oxide film becomes a component of the intermediate insulation film, a component of the first dielectric film, and a component of the second dielectric film;

forming a nitride film over the HTO film located above the second lower electrode, wherein the nitride film over the HTO film located above the second lower electrode becomes a component of the second dielectric film;

forming a second thermal oxide film over the HTO film on the side surface of the floating gate, over the HTO film on the upper surface of the first lower electrode, and over the nitride film on the upper surface of the second lower electrode, wherein the second thermal oxide film over the HTO film on the side surface of the floating gate, over the HTO film on the upper surface of the first lower electrode, and over the nitride film on the upper surface of the second lower electrode becomes a component of the intermediate insulation film, a component of the first dielectric film and a component of the second dielectric film, respectively; and

then forming a control gate, a first upper electrode and a second upper electrode over the integrated circuit substrate.

2. A method for manufacturing an integrated circuit device according to claim 1, wherein forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate, is followed by:

introducing an impurity in the first lower electrode to provide the first lower electrode with a first impurity concentration; and

introducing an impurity in the second lower electrode to provide the second lower electrode with a second impurity concentration that is different from the first impurity concentration.

3. A method for manufacturing an integrated circuit device according to claim 2, wherein forming a nitride film that becomes a component of the second dielectric film over the HTO film located above the second lower electrode:

forming a nitride film in a manner to cover the HTO film on the side surface of the floating gate, the HTO film on the upper surface of the first lower electrode and the HTO film on the upper surface of the second lower electrode;

forming a mask film over the nitride film on the second lower electrode; and

selectively removing the nitride film using the mask film as a mask by an anisotropic etching, to thereby leave the nitride film that becomes a component of the intermediate insulation film and a component of the second dielectric film over the HTO film on the lower section of the sidewall of the floating gate and over the HTO film on the second lower electrode, respectively.

4. A method for manufacturing an integrated circuit device according to claim 3, wherein the floating gate is patterned using the selective oxide film as a mask.

5. A method for manufacturing an integrated circuit device according to claim 4, wherein the nitride film is formed by a CVD method.

6. A method for manufacturing an integrated circuit device according to claim 5, wherein forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate, further comprises:

forming a selective oxide film over the floating gate.

7. A method for manufacturing an integrated circuit device according to claim 6, wherein forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate, comprises:

forming a conductive film over the integrated circuit substrate; and

patterning the conductive film to simultaneously form the floating gate, the first lower electrode and the second lower electrode.

8. A method for manufacturing an integrated circuit device according to claim 7, wherein then forming a control gate, a first upper electrode and a second upper electrode over the integrated circuit substrate, comprises:

forming a second conductive film over the integrated circuit substrate; and

patterning the second conductive film to simultaneously form the control gate, the first upper electrode and the second upper electrode.

9. A method for manufacturing an integrated circuit device according to claim 8, wherein the non-volatile memory transistor includes a split-gate type memory transistor.

10. A method for manufacturing an integrated circuit device according to claim 6, wherein forming the selective oxide film comprises:

forming a first conductive film over the integrated circuit substrate; and

forming the selective oxide film over the first conductive film that becomes the floating gate.

11. A method for manufacturing an integrated circuit device, comprising:

forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate;

forming a first thermal oxide film over portions of the floating gate, the first lower electrode, and the second lower electrode;

forming an HTO film over the first thermal oxide film;

forming a nitride film to cover portions of the HTO film on the floating gate, on the first lower electrode, and on the second lower electrode;

selectively removing portions of the nitride film to leave portions of the nitride film;

forming a second thermal oxide film over the HTO film on portions of the floating gate and the first lower electrode, and over the nitride film on portions of the second lower electrode; and

forming a control gate, a first upper electrode and a second upper electrode.

12. A method for manufacturing an integrated circuit device, comprising:

forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate;

forming a first thermal oxide film over portions of the floating gate, the first lower electrode, and the second lower electrode;

forming an HTO film over the first thermal oxide film;

forming a nitride film to cover portions of the HTO film on the floating gate, on the first lower electrode, and on the second lower electrode;

selectively removing portions of the nitride film to leave portions of the nitride film;

forming a second thermal oxide film over the HTO film on portions of the floating gate and the first lower electrode, and over the nitride film on portions of the second lower electrode; and

forming a control gate, a first upper electrode and a second upper electrode.

13. A method for manufacturing an integrated circuit device, comprising:

forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate;

introducing impurities in the first lower electrode and the second lower electrode;

forming a first thermal oxide film over a side surface of the floating gate, an upper surface of the first lower electrode and an upper surface of the second lower electrode;

forming an HTO film over the first thermal oxide film;

forming a nitride film to cover selected portions of the HTO film on the floating gate, on the first lower electrode, and on the second lower electrode;

selectively removing portions of the nitride film to leave only portions of the nitride film that becomes a component of the intermediate insulation film, and a component of the second dielectric film;

forming a second thermal oxide film over the HTO film on portions of the floating gate, over the HTO film on portions of the first lower electrode and over the nitride film on portions of the second lower electrode; and

forming a control gate, a first upper electrode and a second upper electrode.

14. A method for manufacturing an integrated circuit device, comprising:

forming a floating gate, a first lower electrode and a second lower electrode on an integrated circuit substrate;

introducing an impurity in the first lower electrode to provide the first lower electrode with a first impurity concentration;

introducing an impurity in the second lower electrode to provide the second lower electrode with a second impurity concentration that is different from the first impurity concentration;

forming a first thermal oxide film that becomes a component of an intermediate insulation film, a component of a first dielectric film and a component of a second dielectric film over a side surface of the floating gate, an upper surface of the first lower electrode and an upper surface of the second lower electrode, respectively;

forming an HTO film that becomes a component of the intermediate insulation film, a component of the first dielectric film and a component of the second dielectric film over the first thermal oxide film;

forming a nitride film by chemical vapor deposition to cover the HTO film on the side surface of the floating gate, the HTO film on the upper surface of the first lower electrode and the HTO film on the upper surface of the second lower electrode;

forming a mask film over the nitride film on the second lower electrode;

selectively removing the nitride film using the mask film as a mask by an anisotropic etching, to thereby leave the nitride film that becomes a component of the intermediate insulation film and a component of the second dielectric film over the HTO film on the lower section of the sidewall of the floating gate and over the HTO film on the second lower electrode, respectively;

forming a second thermal oxide film, which becomes a component of the intermediate insulation film, a component of the first dielectric film and a component of the second dielectric film, over the HTO film on the side surface of the floating gate, over the HTO film on the upper surface of the first lower electrode and over the nitride film on the upper surface of the second lower electrode, respectively;

forming a control gate, a first upper electrode and a second upper electrode.

15. A method for manufacturing an integrated circuit device, comprising:

forming a first conductive film over an integrated circuit substrate; and

forming a mask over the first conductive film, the mask comprising a selective oxide film;

patterning the first conductive film to simultaneously form a floating gate, a first lower electrode and a second lower electrode on the integrated circuit substrate;

introducing an impurity in the first lower electrode to provide the first lower electrode with a first impurity concentration;

introducing an impurity in the second lower electrode to provide the second lower electrode with a second impurity concentration that is different from the first impurity concentration;

forming a first thermal oxide film that becomes a component of an intermediate insulation film, a component of a first dielectric film and a component of a second dielectric film over a side surface of the floating gate, an upper surface of the first lower electrode and an upper surface of the second lower electrode, respectively;

forming an HTO film that becomes a component of the intermediate insulation film, a component of the first dielectric film and a component of the second dielectric film over the first thermal oxide film;

forming a nitride film by chemical vapor deposition to cover the HTO film on the side surface of the floating gate, the HTO film on the upper surface of the first lower electrode and the HTO film on the upper surface of the second lower electrode;

forming a mask film over the nitride film on the second lower electrode;

selectively removing the nitride film using the mask film as a mask by an anisotropic etching, to thereby leave the nitride film that becomes a component of the intermediate insulation film and a component of the second dielectric film over the HTO film on the lower section of the sidewall of the floating gate and over the HTO film on the second lower electrode, respectively;

forming a second thermal oxide film, which becomes a component of the intermediate insulation film, a component of the first dielectric film and a component of the second dielectric film, over the HTO film on the side surface of the floating gate, over the HTO film on the upper surface of the first lower electrode and over the nitride film on the upper surface of the second lower electrode, respectively;

forming a second conductive film over the integrated circuit substrate; and

patterning the second conductive film to simultaneously form a control gate, a first upper electrode and a second upper electrode.