Hardware debugging in a hardware description language

• US 6,581,191 B1
• Filed: 11/28/2000
• Issued: 06/17/2003
• Est. Priority Date: 11/30/1999
• Status: Expired due to Term

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synplicity, Inc. (Synopsys Incorporated)
• Inventors: Perry, Douglas L., Beardslee, John Mark, Schubert, Nils Endric
• Primary Examiner(s): Siek, Vuthe
• Assistant Examiner(s): TAT, BINH C
• Application Number:
  US09/724,702
• Time in Patent Office: 931 Days
• Field of Search: 716/4, 716/5, 716/6, 716/17, 716/18, 716/19, 716/2, 716/8, 703/14, 703/15, 703/16, 703/26, 703/27, 703/28, 714/724, 714/725, 714/726, 714/722
• US Class Current: 716/136
• CPC Class Codes: G01R 31/318357 Simulation computer simulation of digital circuits G06F30/3308
• CPC Class Codes: G01R 31/318364 as a result of hardware simulation, e.g. in an HDL environment computer-aided simulation of circuits G06F30/3308
• CPC Class Codes: G06F 11/26 Functional testing
• CPC Class Codes: G06F 30/33 Design verification, e.g. functional simulation or model checking

Abstract

Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

Claims

1. A hardware debugging system for debugging a fabricated integrated circuit containing an electronic circuit design, said hardware debugging system comprising:

an instrumentor configured to receive a high level HDL description of the electronic circuit design, to determine aspects of the electronic circuit design to be examined or modified during debugging, to determine additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and to produce a modified high level HDL description of the electronic circuit design by incorporating an HDL description of the additional circuitry into the high level HDL description of the electronic circuit design;

a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the modified high level HDL description or the high level HDL description; and

a HDL-based hardware debugger configured to debug the fabricated integrated circuit fabricated in accordance with the modified high level HDL description by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the modified high level HDL description or the high level HDL description.

2. A hardware debugging system as recited in claim 1, wherein while debugging the fabricated integrated circuit, the fabricated integrated circuit is operating in its target environment and running at its target speed.

3. A hardware debugging system as recited in claim 2, wherein the target environment includes real-time characteristics.

4. A hardware debugging system as recited in claim 1, wherein while debugging the fabricated integrated circuit, the fabricated integrated circuit is operating in its target environment without interruption.

5. A hardware debugging system as recited in claim 1, wherein said hardware debugging system does not require a testbench.

6. A hardware debugging system as recited in claim 1, wherein at least a portion of the debug information is related back to the high level HDL description for the electronic circuit design.

7. A hardware debugging system as recited in claim 1, wherein the information about the additional circuitry stored in said design instrumentation database further includes at least one or more trigger conditions.

8. A hardware debugging system as recited in claim 1, wherein the information about the additional circuitry stored in said design instrumentation database further includes at least one or more of design control information, design visibility information and design patch information.

9. A hardware debugging system as recited in claim 1, wherein said instrumentor comprises:

an aspect selection processor configured to enable a user to determine the aspects of the electronic circuit design to be examined or modified during debugging through interactive selection.

10. A hardware debugging system as recited in claim 1, wherein the fabricated integrated circuit is part of an electronic system that also includes software, and

wherein said hardware debugging system further comprises:

a software debugger operatively connected to said HDL-based hardware debugger, said software debugger operates to debug the software.

11. A hardware debugging system as recited in claim 10, wherein the fabricated integrated circuit includes a processor, and wherein the software is executed by said processor.

12. A hardware debugging system as recited in claim 10, wherein said HDL-based hardware debugger and said software debugger are synchronized during debugging of the fabricated integrated circuit.

13. A hardware debugging system as recited in claim 12, wherein while said HDL-based hardware debugger operates to debug the fabricated integrated circuit, the fabricated integrated circuit is operating in its target environment and running at its target speed.

14. A hardware debugging system as recited in claim 13, wherein the target environment includes real-time characteristics.

15. A hardware debugging system as recited in claim 13, wherein said hardware debugging system does not require a testbench.

16. A hardware debugging system as recited in claim 1, wherein said instrumentor operates to customize the additional circuitry for use with at least a portion of the electronic circuit design.

17. A hardware debugging system as recited in claim 1, wherein the HDL description contains a hierarchical structure of HDL building blocks.

18. A hardware debugging system as recited in claim 17, wherein the aspects of the electronic circuit design to be examined or modified during debugging are determined in different ones of the HDL building blocks of the hierarchical structure.

19. A hardware debugging system as recited in claim 1, wherein the electronic circuit design includes both analog and digital aspects.

20. A hardware debugging system as recited in claim 1, wherein said instrumentor operates to permit alteration of the additional circuitry to trade-off debugging coverage versus area cost.

21. A hardware debugging system as recited in claim 1, wherein the electronic circuit design includes at least one pre-designed block of circuitry having instrumentation circuitry.

22. A hardware debugging system for debugging an electronic system containing an electronic circuit design, the electronic circuit design being described by a high level HDL description, said hardware debugging system comprising:

an instrumentor configured to receive the high level HDL description of the electronic circuit design or a description derived therefrom, to determine aspects of the electronic circuit design to be examined or modified during debugging, to determine additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and to incorporate the additional circuitry into the electronic circuit design;

a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the high level HDL description; and

a HDL-based hardware debugger configured to debug the electronic system by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the high level HDL description.

23. A hardware debugging system as recited in claim 22, wherein said HDL-based hardware debugger operates to identify functional failures that result from not only design errors but also tool errors or manufacturing faults.

24. A hardware debugging system as recited in claim 22, wherein said HDL-based hardware debugger further operates to identify functional failures that result from specification errors.

25. A hardware debugging system as recited in claim 22, wherein while said HDL-based hardware debugger operates to debug the electronic system, the electronic system is operating in its target environment and running at its target speed.

26. A hardware debugging system as recited in claim 25, wherein the target environment includes real-time characteristics.

27. A hardware debugging system as recited in claim 25, wherein said hardware debugging system does not require a testbench.

28. A hardware debugging system as recited in claim 22, wherein said instrumentor operates to customize the additional circuitry for use with at least a portion of the electronic circuit design.

29. A hardware debugging system as recited in claim 22, wherein the HDL description contains a hierarchical structure of HDL building blocks.

30. A hardware debugging system as recited in claim 29, wherein the aspects of the electronic circuit design to be examined or modified during debugging are determined in different ones of the HDL building blocks of the hierarchical structure.

31. A hardware debugging system as recited in claim 22, wherein the electronic circuit design includes both analog and digital aspects.

32. A hardware debugging system as recited in claim 22, wherein said instrumentor operates to permit alteration of the additional circuitry to trade-off debugging coverage versus area cost.

33. A hardware debugging system as recited in claim 22, wherein the electronic circuit design includes at least one pre-designed block of circuitry having internal circuitry.

34. A hardware debugging system as recited in claim 22, wherein said hardware debugging system further comprises at least one of a design layout, synthesis or simulation tool, and

wherein said instrumentor is within said at least one of the design layout, synthesis or simulation tool.

35. A hardware debugging system as recited in claim 22, wherein the electronic system includes hardware and software, and

wherein said hardware debugging system further comprises:

a software debugger operatively connected to said HDL-based hardware debugger, said software debugger operates to debug the software of the electronic circuit design.

36. A hardware debugging system as recited in claim 35, wherein the electronic system includes a processor, and wherein the software is executed by said processor.

37. A hardware debugging system as recited in claim 35, wherein said HDL-based hardware debugger and said software debugger are synchronized during debugging of the electronic system.

38. A hardware debugging system as recited in claim 22, wherein the electronic system comprises an integrated circuit hardware product, the integrated circuit hardware product including at least a portion of the electronic circuit design.

39. A hardware debugging system as recited in claim 22, wherein the electronic system comprises a programmable integrated circuit, the programmable integrated circuit being programmed to include at least a portion of the electronic circuit design.

40. A hardware debugging system as recited in claim 22, wherein the electronic system comprises a printed circuit board with electronic components thereon, the printed circuit board including at least a portion of the electronic circuit design.

41. A hardware debugging system for debugging an electronic system containing an electronic circuit design, the electronic circuit design being described by a high level HDL description, said hardware debugging system comprising:

instrumentation means for receiving the high level HDL description of the electronic circuit design or a description derived therefrom, determining additional circuitry to be incorporated into the electronic circuit design to facilitate debugging, and incorporating the additional circuitry into the electronic circuit design;

a design instrumentation database configured to store information about the additional circuitry including relationships between signals of the electronic circuit design and portions of the high level HDL description; and

a HDL-based hardware debugger configured to debug the electronic system by interacting with the electronic circuit design using the additional circuitry and by operating to present debug information with respect to the high level HDL description.