Method of making a pillar in a laminated structure for a semiconductor chip assembly

• US 6,583,040 B1
• Filed: 05/28/2002
• Issued: 06/24/2003
• Est. Priority Date: 10/13/2000
• Status: Expired due to Fees

• Current Assignee: Bridge Semiconductor Corporation
• Original Assignee: Bridge Semiconductor Corporation
• Inventors: Lin, Charles W. C.
• Primary Examiner(s): Picardat, Kevin M.
• Application Number:
  US10/156,277
• Time in Patent Office: 392 Days
• Field of Search: 438/107, 438/108, 438/110, 438/125, 438/612, 438/613, 438/118, 438/611
• US Class Current: 438/612
• CPC Class Codes: H01L 21/4853 Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05023 the whole internal layer protruding from the surface
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/1134 Stud bumping, i.e. using a wire-bonding apparatus
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/24225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45124 Aluminium (Al) as principal constituent
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48 of an individual wire connector
• CPC Class Codes: H01L 2224/8203 Reshaping, e.g. forming vias
• CPC Class Codes: H01L 2224/92144 the second connecting process involving a build-up interconnect
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/11 Manufacturing methods for bumps on insulating substrates H01L21/4853
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00013 Fully indexed content
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01011 : Sodium [Na]
• CPC Class Codes: H01L 2924/01012 : Magnesium [Mg]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01015 : Phosphorus [P]
• CPC Class Codes: H01L 2924/01022 : Titanium [Ti]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/0104 : Zirconium [Zr]
• CPC Class Codes: H01L 2924/01046 : Palladium [Pd]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01077 : Iridium [Ir]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/07802 : not being an ohmic electrical conductor
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/1433 : Application-specific integrated circuit [ASIC]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 3/4046 : using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire

Abstract

A method of making a semiconductor chip assembly includes providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, an insulative base and a metal base, the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base, removing a portion of the metal base that contacts the pillar, and forming a connection joint that contacts and electrically connects the conductive trace and the pad.

Claims

1. A method of making a semiconductor chip assembly, comprising:

providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, an insulative base and a metal base, the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

removing a portion of the metal base that contacts the pillar; and

forming a connection joint that contacts and electrically connects the conductive trace and the pad.

2. The method of claim 1, including mechanically attaching the chip to the conductive trace using an insulative adhesive before removing the portion of the metal base.

3. The method of claim 2, including forming a through-hole that extends through the insulative base and the adhesive and exposes the conductive trace and the pad after removing the portion of the metal base and before forming the connection joint.

4. The method of claim 3, wherein the adhesive contacts and is sandwiched between the conductive trace and the pad, and the conductive trace and the pad are electrically isolated from one another after forming the through-hole and before forming the connection joint.

5. The method of claim 1, wherein the pillar extends into and contacts sidewalls of an opening in the routing line.

6. The method of claim 1, wherein the pillar has straight vertical sidewalls.

7. The method of claim 1, wherein the pillar is solder or conductive adhesive.

8. The method of claim 1, wherein the routing line and the metal base are a first material and the pillar is a second material.

9. The method of claim 8, wherein the first material is copper and the second material is solder or conductive adhesive.

10. The method of claim 1, wherein the assembly is devoid of wire bonds and TAB leads.

11. A method of making a semiconductor chip assembly, comprising:

providing a semiconductor chip that includes a conductive pad;

providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

then

disposing an insulative adhesive between the chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure such that the metal base is disposed on a side of the insulative base that faces away from the chip and the routing line is disposed on a side of the insulative base that faces towards the chip;

then

removing a portion of the metal base that contacts the pillar; and

forming a connection joint that contacts and electrically connects the conductive trace and the pad.

12. The method of claim 11, including forming a through-hole that extends through the insulative base and the adhesive and exposes the conductive trace and the pad after removing the portion of the metal base and before forming the connection joint.

13. The method of claim 11, wherein the routing line overlaps the pad and extends within and outside a periphery of the chip, the pillar is disposed outside the periphery of the chip, and the pillar extends across the opposite sides of the insulative base.

14. The method of claim 11, wherein forming the pillar includes:

forming a via that extends through the insulative base and into the metal base; and

then

depositing an electrically conductive material into the via, wherein the electrically conductive material in the via contacts the insulative base and the metal base.

15. The method of claim 14, wherein the electrically conductive material includes solder.

16. The method of claim 14, wherein the electrically conductive material includes conductive adhesive.

17. The method of claim 11, wherein removing the portion of the metal base exposes the insulative base.

18. The method of claim 11, wherein removing the portion of the metal base exposes straight vertical sidewalls of the pillar that extend from the insulative base away from the chip.

19. The method of claim 11, wherein the pillar is the only electrical conductor that is electrically connected to the pad and extends to the side of the insulative base that faces away from the chip.

20. The method of claim 11, wherein the assembly is devoid of wire bonds and TAB leads.

21. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

then

disposing an insulative adhesive between a chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip and extends within and outside a periphery of the chip, and the pillar is disposed outside the periphery of the chip and extends through the insulative base;

removing a portion of the metal base that contacts the pillar; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

22. The method of claim 21, wherein forming the pillar includes:

forming a via that extends through the insulative base and into the metal base; and

then

depositing an electrically conductive material into the via, wherein the electrically conductive material in the via contacts the insulative base and the metal base.

23. The method of claim 22, wherein the via extends through the metal base and the routing line.

24. The method of claim 22, wherein the via extends through the metal base and into but not through the routing line.

25. The method of claim 22, wherein the via extends through the routing line and into but not through the metal base.

26. The method of claim 22, wherein the electrically conductive material is solder paste.

27. The method of claim 22, wherein the electrically conductive material is conductive adhesive.

28. The method of claim 21, wherein the pillar is the only electrical conductor that is electrically connected to the pad and extends to the side of the insulative base that faces away from the chip after forming the connection joint.

29. The method of claim 21, wherein removing the portion of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the pillar.

30. The method of claim 21, wherein the assembly is devoid of wire bonds and TAB leads.

31. A method of making a semiconductor chip assembly, comprising the following steps in the sequence set forth:

providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

disposing an insulative adhesive between a chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip and extends within and outside a periphery of the chip, and the pillar is disposed outside the periphery of the chip and extends through the insulative base;

removing portions of the metal base that overlap the pad and contact the pillar;

forming a through-hole that extends through the insulative base and the adhesive and exposes the routing line and the pad; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

32. The method of claim 31, wherein forming the pillar includes:

forming a via that extends through the insulative base and into the metal base; and

then

depositing an electrically conductive material into the via, wherein the electrically conductive material in the via contacts the insulative base and the metal base.

33. The method of claim 32, wherein the via extends through the metal base and the routing line.

34. The method of claim 32, wherein the via extends through the metal base and into but not through the routing line.

35. The method of claim 32, wherein the via extends through the routing line and into but not through the metal base.

36. The method of claim 32, wherein the electrically conductive material is solder paste.

37. The method of claim 32, wherein the electrically conductive material is conductive adhesive.

38. The method of claim 31, wherein the pillar is the only electrical conductor that is electrically connected to the pad and extends to the side of the insulative base that faces away from the chip after forming the connection joint.

39. The method of claim 31, wherein removing the portions of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the pillar.

40. The method of claim 31, wherein the assembly is devoid of wire bonds and TAB leads.

41. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the insulative base and into the metal base and the metal layer;

depositing a non-solidified material into the via;

hardening the non-solidified material to form a pillar that fills the portion of the via that extends through the insulative base, at least partially fills the portion of the via that extends into the metal base and at least partially fills the portion of the via that extends into the metal layer;

providing an etch mask on the metal layer, wherein the etch mask includes an opening that exposes a portion of the metal layer;

applying an etch to the exposed portion of the metal layer through the opening in the etch mask, thereby forming a routing line from an unetched portion of the metal layer;

then

mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the pillar, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, and the pillar contacts the routing line;

removing a portion of the metal base that contacts the pillar, wherein the pillar extends beyond the insulative base in a direction away from the chip; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

42. The method of claim 41, wherein forming the via includes mechanical drilling.

43. The method of claim 41, wherein depositing the non-solidified material includes depositing solder paste that contacts the metal base, the insulative base and the metal layer in the via.

44. The method of claim 41, wherein depositing the non-solidified material includes depositing conductive adhesive that contacts the metal base, the insulative base and the metal layer in the via.

45. The method of claim 41, wherein providing the etch mask includes depositing a photoresist layer on the metal layer and selectively patterning the photoresist layer after forming the via and before forming the pillar.

46. The method of claim 41, wherein removing the portion of the metal base includes applying a wet chemical etch that is highly selective of the metal base with respect to the insulative base and the pillar and removes all of the metal base.

47. The method of claim 41, wherein the via extends through the metal base.

48. The method of claim 41, wherein the via extends through the routing line.

49. The method of claim 41, wherein the via extends through the metal base and the routing line.

50. The method of claim 41, wherein the assembly is devoid of wire bonds and TAB leads.

51. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the insulative base and into the metal base and the metal layer;

depositing a non-solidified material into the via;

hardening the non-solidified material to form a pillar that fills the portion of the via that extends through the insulative base, at least partially fills the portion of the via that extends into the metal base and at least partially fills the portion of the via that extends into the metal layer;

providing an etch mask on the metal layer, wherein the etch mask includes an opening that exposes a portion of the metal layer;

applying an etch to the exposed portion of the metal layer through the opening in the etch mask, thereby forming a routing line from an unetched portion of the metal layer; and

then, in the sequence set forth,

mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the pillar, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, the routing line overlaps the pad and extends within and outside a periphery of the chip, and the pillar contacts the routing line and is disposed outside the periphery of the chip;

removing a first portion of the metal base that overlaps the pad and a second portion of the metal base that contacts the pillar, wherein the pillar extends beyond the insulative base in a direction away from the chip;

forming a through-hole that extends through the insulative base and the adhesive and exposes the routing line and the pad; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

52. The method of claim 51, wherein forming the via includes mechanical drilling.

53. The method of claim 51, wherein depositing the non-solidified material includes depositing solder paste that contacts the metal base, the insulative base and the metal layer in the via.

54. The method of claim 51, wherein depositing the non-solidified material includes depositing conductive adhesive that contacts the metal base, the insulative base and the metal layer in the via.

55. The method of claim 51, wherein providing the etch mask includes depositing a photoresist layer on the metal layer and selectively patterning the photoresist layer after forming the via and before forming the pillar.

56. The method of claim 51, wherein removing the first and second portions of the metal base includes applying a wet chemical etch that is highly selective of the metal base with respect to the insulative base and the pillar and removes all of the metal base.

57. The method of claim 51, wherein the via extends through the metal base.

58. The method of claim 51, wherein the via extends through the routing line.

59. The method of claim 51, wherein the via extends through the metal base and the routing line.

60. The method of claim 51, wherein the assembly is devoid of wire bonds and TAB leads.

61. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the insulative base and reaches the metal base and the metal layer;

forming a routing line from a first portion of the metal layer by selectively removing a second portion of the metal layer;

forming a pillar in the via, wherein the pillar extends through the insulative base and contacts the metal base, the insulative base and the metal layer in the via;

then

mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the pillar, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, and the pillar contacts the routing line;

then

removing a portion of the metal base that contacts the pillar; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

62. The method of claim 61, wherein the via extends into the metal base.

63. The method of claim 61, wherein the via extends through the metal base.

64. The method of claim 61, wherein the via extends into the routing line.

65. The method of claim 61, wherein the via extends through the routing line.

66. The method of claim 61, wherein the via extends through the metal base and into but not through the routing line.

67. The method of claim 61, wherein the via extends through the routing line and into but not through the metal base.

68. The method of claim 61, wherein the via extends through the metal base and the routing line.

69. The method of claim 61, wherein forming the via includes mechanical drilling.

70. The method of claim 61, wherein forming the via includes mechanical punching.

71. The method of claim 61, wherein forming the via includes laser drilling.

72. The method of claim 61, wherein forming the via includes wet chemical etching.

73. The method of claim 61, wherein forming the pillar includes depositing a non-solidified material into the via that contacts the metal base, the insulative base and the metal layer in the via and then hardening the non-solidified material.

74. The method of claim 61, wherein forming the pillar includes depositing solder paste into the via that contacts the metal base, the insulative base and the metal layer in the via and then reflowing the solder paste.

75. The method of claim 61, wherein forming the pillar includes depositing conductive adhesive into the via that contacts the metal base, the insulative base and the metal layer in the via and then curing the conductive adhesive.

76. The method of claim 61, wherein removing the portion of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the pillar and removes all of the metal base.

77. The method of claim 61, including forming an encapsulant on the chip, the insulative base and the routing line after attaching the chip to the laminated structure and before removing the portion of the metal base.

78. The method of claim 61, wherein the steps are performed in the sequence set forth.

79. The method of claim 61, wherein the metal base and the metal layer are copper, the pillar is solder or conductive adhesive, the insulative base is primarily polyimide or epoxy, and the adhesive is primarily polyimide or epoxy.

80. The method of claim 61, wherein the assembly is devoid of wire bonds and TAB leads.

81. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the metal base, the insulative base and the metal layer;

forming a conductive trace that includes a routing line and a pillar, wherein the routing line and the pillar are different materials, the routing line is formed from an unetched portion of the metal layer, and the pillar contacts the metal base, the insulative base and the routing line in the via, extends across the opposite sides of the insulative base, and extends into the metal base and the routing line;

then

mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip;

removing a portion of the metal base that contacts the pillar, wherein the pillar includes an exposed protruding portion that extends beyond the insulative base in a direction away from the chip; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

82. The method of claim 81, wherein the pillar is disposed within a periphery of the chip.

83. The method of claim 81, wherein the pillar is disposed outside a periphery of the chip.

84. The method of claim 81, wherein the pillar is solder.

85. The method of claim 81, wherein the pillar is conductive adhesive.

86. The method of claim 81, wherein the metal base and the metal layer are copper.

87. The method of claim 86, wherein the pillar is solder.

88. The method of claim 86, wherein the pillar is conductive adhesive.

89. The method of claim 81, wherein the steps are performed in the sequence set forth.

90. The method of claim 81, wherein the assembly is devoid of wire bonds and TAB leads.

91. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the metal base, the insulative base and the metal layer and has open opposing ends;

providing a plug that seals the via at one end such that the via has a sealed end and an unsealed end;

depositing an electrically conductive material into the via from the unsealed end while the plug provides the sealed end, wherein the electrically conductive material contacts the plug, the metal base, the insulative base and the metal layer in the via;

removing the plug;

forming a conductive trace that includes a routing line and a pillar, wherein the routing line is formed from an unetched portion of the metal layer, the pillar is formed from the electrically conductive material, and the pillar contacts the metal base, the insulative base and the routing line in the via, extends across the opposite sides of the insulative base, and extends into the metal base and the routing line;

mechanically attaching a chip to the laminated structure using an insulative adhesive, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip;

removing a portion of the metal base that contacts the pillar, wherein the pillar includes an exposed protruding portion that extends beyond the insulative base in a direction away from the chip; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

92. The method of claim 91, wherein the sealed end is at the metal base and the unsealed end is at the metal layer.

93. The method of claim 91, wherein the sealed end is at the metal layer and the unsealed end is at the metal base.

94. The method of claim 91, wherein the electrically conductive material is solder paste and the pillar is solder.

95. The method of claim 91, wherein the electrically conductive material is uncured conductive adhesive and the pillar is cured conductive adhesive.

96. The method of claim 91, wherein the metal base and the metal layer are copper.

97. The method of claim 96, wherein the electrically conductive material is solder paste and the pillar is solder.

98. The method of claim 96, wherein the electrically conductive material is uncured conductive adhesive and the pillar is cured conductive adhesive.

99. The method of claim 91, wherein steps are performed in the sequence set forth.

100. The method of claim 91, wherein the assembly is devoid of wire bonds and TAB leads.

101. A method of making a semiconductor chip assembly, comprising:

providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, other conductive traces, an insulative base and a metal base, the conductive trace includes a routing line and a pillar, the other conductive traces include other routing lines and other pillars, the metal base and the routing line are disposed on opposite sides of the insulative base, the metal base and the other routing lines are disposed on opposite sides of the insulative base, the pillar contacts the routing line and extends through the insulative base and into the metal base, the other pillars contact the other routing lines and extend through the insulative base and into the metal base, and the metal base electrically connects the conductive trace to the other conductive traces;

then

removing a portion of the metal base, thereby electrically isolating the conductive trace from the other conductive traces; and

forming a connection joint that contacts and electrically connects the conductive trace and the pad.

102. The method of claim 101, including mechanically attaching the chip to the conductive trace using an adhesive before removing the portion of the metal base.

103. The method of claim 102, including forming a through-hole that extends through the insulative base and the adhesive and exposes the conductive trace and the pad after mechanically attaching the chip to the conductive trace and before forming the connection joint.

104. The method of claim 103, wherein the adhesive contacts and is sandwiched between the conductive trace and the pad, and the conductive trace and the pad are electrically isolated from one another after forming the through-hole and before forming the connection joint.

105. The method of claim 101, wherein the pillar extends into and contacts sidewalls of an opening in the routing line.

106. The method of claim 101, wherein the pillar has straight vertical sidewalls.

107. The method of claim 101, wherein the pillar is solder or conductive adhesive.

108. The method of claim 101, wherein the routing line and the metal base are a first material and the pillar is a second material.

109. The method of claim 108, wherein the first material is copper and the second material is solder or conductive adhesive.

110. The method of claim 101, wherein the assembly is devoid of wire bonds and TAB leads.

111. A method of making a semiconductor chip assembly, comprising:

providing a semiconductor chip that includes a conductive pad;

providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

then

disposing an adhesive between the chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure such that the metal base is disposed on a side of the insulative base that faces away from the chip and the routing line is disposed on a side of the insulative base that faces towards the chip;

then

removing a portion of the metal base, thereby electrically isolating the pillar from other pillars that extend through the insulative base; and

forming a connection joint that contacts and electrically connects the conductive trace and the pad.

112. The method of claim 111, including forming a through-hole that extends through the insulative base and the adhesive and exposes the conductive trace and the pad after mechanically attaching the chip to the laminated structure and before forming the connection joint.

113. The method of claim 111, wherein the routing line overlaps the pad and extends within and outside a periphery of the chip, the pillar is disposed outside the periphery of the chip, and the pillar extends across the opposite sides of the insulative base.

114. The method of claim 111, wherein forming the pillar includes:

forming a via that extends through the insulative base and into the metal base; and

then

depositing an electrically conductive material into the via, wherein the electrically conductive material in the via contacts the insulative base and the metal base.

115. The method of claim 114, wherein the electrically conductive material includes solder.

116. The method of claim 114, wherein the electrically conductive material includes conductive adhesive.

117. The method of claim 111, wherein removing the portion of the metal base exposes the insulative base.

118. The method of claim 111, wherein removing the portion of the metal base exposes straight vertical sidewalls of the pillar that extend from the insulative base away from the chip.

119. The method of claim 111, wherein the pillar is the only electrical conductor that is electrically connected to the pad and extends beyond the insulative base in a direction away from the chip after removing the portion of the metal base and forming the connection joint.

120. The method of claim 111, wherein the assembly is devoid of wire bonds and TAB leads.

121. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

then

disposing an adhesive between a chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip and extends within and outside a periphery of the chip, and the pillar is disposed outside the periphery of the chip and extends through the insulative base;

then

removing a portion of the metal base that contacts the pillar, thereby electrically isolating the pillar from other pillars that extend through the insulative base; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

122. The method of claim 121, wherein forming the pillar includes:

forming a via that extends through the insulative base and into the metal base; and

then

depositing an electrically conductive material into the via, wherein the electrically conductive material in the via contacts the insulative base and the metal base.

123. The method of claim 122, wherein the via extends through the metal base and the routing line.

124. The method of claim 122, wherein the via extends through the metal base and into but not through the routing line.

125. The method of claim 122, wherein the via extends through the routing line and into but not through the metal base.

126. The method of claim 122, wherein the electrically conductive material is solder paste.

127. The method of claim 122, wherein the electrically conductive material is conductive adhesive.

128. The method of claim 121, wherein the pillar is the only electrical conductor that is electrically connected to the pad and extends beyond the insulative base in a direction away from the chip after removing the portion of the metal base and forming the connection joint.

129. The method of claim 121, wherein removing the portion of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the pillar.

130. The method of claim 121, wherein the assembly is devoid of wire bonds and TAB leads.

131. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a conductive trace, an insulative base and a metal base, wherein the conductive trace includes a routing line and a pillar, the metal base and the routing line are disposed on opposite sides of the insulative base, and the pillar contacts the routing line and extends through the insulative base and into the metal base;

disposing an adhesive between a chip and the laminated structure, thereby mechanically attaching the chip to the laminated structure, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip and extends within and outside a periphery of the chip, and the pillar is disposed outside the periphery of the chip and extends through the insulative base;

then

removing portions of the metal base that contact the pillar and other pillars that extend through the insulative base, thereby electrically isolating the pillar from the other pillars; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

132. The method of claim 131, wherein forming the pillar includes:

forming a via that extends through the insulative base and into the metal base; and

then

depositing an electrically conductive material into the via, wherein the electrically conductive material in the via contacts the insulative base and the metal base.

133. The method of claim 132, wherein the via extends through the metal base and the routing line.

134. The method of claim 132, wherein the via extends through the metal base and into but not through the routing line.

135. The method of claim 132, wherein the via extends through the routing line and into but not through the metal base.

136. The method of claim 132, wherein the electrically conductive material is solder paste.

137. The method of claim 132, wherein the electrically conductive material is conductive adhesive.

138. The method of claim 131, wherein the pillar is the only electrical conductor that is electrically connected to the pad and extends beyond the insulative base in a direction away from the chip after removing the portions of the metal base and forming the connection joint.

139. The method of claim 131, wherein removing the portions of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the pillar.

140. The method of claim 131, wherein the assembly is devoid of wire bonds and TAB leads.

141. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the insulative base and into the metal base and the metal layer;

depositing a non-solidified material into the via;

hardening the non-solidified material to form a pillar that fills the portion of the via that extends through the insulative base, at least partially fills the portion of the via that extends into the metal base and at least partially fills the portion of the via that extends into the metal layer;

providing an etch mask on the metal layer, wherein the etch mask includes an opening that exposes a portion of the metal layer;

applying an etch to the exposed portion of the metal layer through the opening in the etch mask, thereby forming a routing line from an unetched portion of the metal layer;

then

mechanically attaching a chip to the laminated structure using an adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the pillar, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, and the pillar contacts the routing line;

then

removing a portion of the metal base that contacts the pillar, thereby electrically isolating the pillar from other pillars that extend through the insulative base, wherein the pillar extends beyond the insulative base in a direction away from the chip; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

142. The method of claim 141, wherein forming the via includes mechanical drilling.

143. The method of claim 141, wherein depositing the non-solidified material includes depositing solder paste that contacts the metal base, the insulative base and the metal layer in the via.

144. The method of claim 141, wherein depositing the non-solidified material includes depositing conductive adhesive that contacts the metal base, the insulative base and the metal layer in the via.

145. The method of claim 141, wherein providing the etch mask includes depositing a photoresist layer on the metal layer and selectively patterning the photoresist layer after forming the via and before forming the pillar.

146. The method of claim 141, wherein removing the portion of the metal base includes applying a wet chemical etch that is highly selective of the metal base with respect to the insulative base and the pillar and removes all remaining portions of the metal base that overlap the chip.

147. The method of claim 141, wherein the via extends through the metal base.

148. The method of claim 141, wherein the via extends through the routing line.

149. The method of claim 141, wherein the via extends through the metal base and the routing line.

150. The method of claim 141, wherein the assembly is devoid of wire bonds and TAB leads.

151. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the insulative base and into the metal base and the metal layer;

depositing a non-solidified material into the via;

hardening the non-solidified material to form a pillar that fills the portion of the via that extends through the insulative base, at least partially fills the portion of the via that extends into the metal base and at least partially fills the portion of the via that extends into the metal layer;

providing an etch mask on the metal layer, wherein the etch mask includes an opening that exposes a portion of the metal layer;

applying an etch to the exposed portion of the metal layer through the opening in the etch mask, thereby forming a routing line from an unetched portion of the metal layer;

then

mechanically attaching a chip to the laminated structure using an adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the pillar, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, the routing line overlaps the pad and extends within and outside a periphery of the chip, and the pillar contacts the routing line and is disposed outside the periphery of the chip;

then

removing a first portion of the metal base that contacts the pillar and a second portion of the metal base that contacts other pillars that extend through the insulative base, thereby electrically isolating the pillar from the other pillars, wherein the pillar extends beyond the insulative base in a direction away from the chip;

forming a through-hole that extends through the insulative base and the adhesive and exposes the routing line and the pad; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

152. The method of claim 151, wherein forming the via includes mechanical drilling.

153. The method of claim 151, wherein depositing the non-solidified material includes depositing solder paste that contacts the metal base, the insulative base and the metal layer in the via.

154. The method of claim 151, wherein depositing the non-solidified material includes depositing conductive adhesive that contacts the metal base, the insulative base and the metal layer in the via.

155. The method of claim 151, wherein providing the etch mask includes depositing a photoresist layer on the metal layer and selectively patterning the photoresist layer after forming the via and before forming the pillar.

156. The method of claim 151, wherein removing the first and second portions of the metal base includes applying a wet chemical etch that is highly selective of the metal base with respect to the insulative base and the pillar and removes all remaining portions of the metal base that overlap the chip.

157. The method of claim 151, wherein the via extends through the metal base.

158. The method of claim 151, wherein the via extends through the routing line.

159. The method of claim 151, wherein the via extends through the metal base and the routing line.

160. The method of claim 151, wherein the assembly is devoid of wire bonds and TAB leads.

161. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the insulative base and reaches the metal base and the metal layer;

forming a routing line from a first portion of the metal layer by selectively removing a second portion of the metal layer;

forming a pillar in the via, wherein the pillar extends through the insulative base and contacts the metal base, the insulative base and the metal layer in the via;

then

mechanically attaching a chip to the laminated structure using an adhesive, wherein the chip includes a pad, a conductive trace includes the routing line and the pillar, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, and the pillar contacts the routing line;

then

removing a portion of the metal base that contacts the pillar, thereby electrically isolating the pillar from other pillars that extend through the insulative base; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

162. The method of claim 161, wherein the via extends into the metal base.

163. The method of claim 161, wherein the via extends through the metal base.

164. The method of claim 161, wherein the via extends into the routing line.

165. The method of claim 161, wherein the via extends through the routing line.

166. The method of claim 161, wherein the via extends through the metal base and into but not through the routing line.

167. The method of claim 161, wherein the via extends through the routing line and into but not through the metal base.

168. The method of claim 161, wherein the via extends through the metal base and the routing line.

169. The method of claim 161, wherein forming the via includes mechanical drilling.

170. The method of claim 161, wherein forming the via includes mechanical punching.

171. The method of claim 161, wherein forming the via includes laser drilling.

172. The method of claim 161, wherein forming the via includes wet chemical etching.

173. The method of claim 161, wherein forming the pillar includes depositing a non-solidified material into the via that contacts the metal base, the insulative base and the metal layer in the via and then hardening the non-solidified material.

174. The method of claim 161, wherein forming the pillar includes depositing solder paste into the via that contacts the metal base, the insulative base and the metal layer in the via and then reflowing the solder paste.

175. The method of claim 161, wherein forming the pillar includes depositing conductive adhesive into the via that contacts the metal base, the insulative base and the metal layer in the via and then curing the conductive adhesive.

176. The method of claim 161, wherein removing the portion of the metal base includes applying a wet chemical etch that is selective of the metal base with respect to the pillar and removes all remaining portions of the metal base that overlap the chip.

177. The method of claim 161, including forming an encapsulant on the chip, the insulative base and the routing line after attaching the chip to the laminated structure and before removing the portion of the metal base.

178. The method of claim 161, wherein the steps are performed in the sequence set forth.

179. The method of claim 161, wherein the metal base and the metal layer are copper, the pillar is solder or conductive adhesive, the insulative base is primarily polyimide or epoxy, and the adhesive is primarily polyimide or epoxy.

180. The method of claim 161, wherein the assembly is devoid of wire bonds and TAB leads.

181. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the metal base, the insulative base and the metal layer;

forming a conductive trace that includes a routing line and a pillar, wherein the routing line and the pillar are different materials, the routing line is formed from an unetched portion of the metal layer, and the pillar contacts the metal base, the insulative base and the routing line in the via, extends across the opposite sides of the insulative base, and extends into the metal base and the routing line;

then

mechanically attaching a chip to the laminated structure using an adhesive, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip;

then

removing a portion of the metal base that contacts the pillar, thereby electrically isolating the pillar from other pillars that extend through the insulative base, wherein the pillar includes an exposed protruding portion that extends beyond the insulative base in a direction away from the chip; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

182. The method of claim 181, wherein the pillar is disposed within a periphery of the chip.

183. The method of claim 181, wherein the pillar is disposed outside a periphery of the chip.

184. The method of claim 181, wherein the pillar is solder.

185. The method of claim 181, wherein the pillar is conductive adhesive.

186. The method of claim 181, wherein the metal base and the metal layer are copper.

187. The method of claim 186, wherein the pillar is solder.

188. The method of claim 186, wherein the pillar is conductive adhesive.

189. The method of claim 181, wherein the steps are performed in the sequence set forth.

190. The method of claim 181, wherein the assembly is devoid of wire bonds and TAB leads.

191. A method of making a semiconductor chip assembly, comprising:

providing a laminated structure that includes a metal base, an insulative base and a metal layer, wherein the metal base and the metal layer are disposed on opposite sides of the insulative base;

forming a via in the laminated structure that extends through the metal base, the insulative base and the metal layer and has open opposing ends;

providing a plug that seals the via at one end such that the via has a sealed end and an unsealed end;

depositing an electrically conductive material into the via from the unsealed end while the plug provides the sealed end, wherein the electrically conductive material contacts the plug, the metal base, the insulative base and the metal layer in the via;

removing the plug;

forming a conductive trace that includes a routing line and a pillar, wherein the routing line is formed from an unetched portion of the metal layer, the pillar is formed from the electrically conductive material, and the pillar contacts the metal base, the insulative base and the routing line in the via, extends across the opposite sides of the insulative base, and extends into the metal base and the routing line;

mechanically attaching a chip to the laminated structure using an adhesive, wherein the chip includes a pad, the metal base is disposed on a side of the insulative base that faces away from the chip, and the routing line is disposed on a side of the insulative base that faces towards the chip;

then

removing a portion of the metal base that contacts the pillar, thereby electrically isolating the pillar from other pillars that extend through the insulative base, wherein the pillar includes an exposed protruding portion that extends beyond the insulative base in a direction away from the chip; and

forming a connection joint that contacts and electrically connects the routing line and the pad.

192. The method of claim 191, wherein the sealed end is at the metal base and the unsealed end is at the metal layer.

193. The method of claim 191, wherein the sealed end is at the metal layer and the unsealed end is at the metal base.

194. The method of claim 191, wherein the electrically conductive material is solder paste and the pillar is solder.

195. The method of claim 191, wherein the electrically conductive material is uncured conductive adhesive and the pillar is cured conductive adhesive.

196. The method of claim 191, wherein the metal base and the metal layer are copper.

197. The method of claim 196, wherein the electrically conductive material is solder paste and the pillar is solder.

198. The method of claim 196, wherein the electrically conductive material is uncured conductive adhesive and the pillar is cured conductive adhesive.

199. The method of claim 191, wherein steps are performed in the sequence set forth.

200. The method of claim 191, wherein the assembly is devoid of wire bonds and TAB leads.